74HC366PW-Q100,118 NXP Semiconductors, 74HC366PW-Q100,118 Datasheet
74HC366PW-Q100,118
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74HC366PW-Q100,118 Summary of contents
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Hex buffer/line driver; 3-state; inverting Rev. 1 — 7 August 2012 1. General description The 74HC366-Q100; 74HCT366-Q100 is a hex inverter/line driver with 3-state outputs controlled by the output enable inputs (OEn). A HIGH on OEn causes the ...
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... NXP Semiconductors 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name 74HC366-Q100 40 C to +125 C 74HC366D-Q100 40 C to +125 C 74HC366PW-Q100 74HCT366-Q100 40 C to +125 C 74HCT366D-Q100 74HCT366PW-Q100 40 C to +125 C 4. Functional diagram ...
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... NXP Semiconductors OE1 OE2 Fig 4. Logic diagram 5. Pinning information 5.1 Pinning Fig 5. Pin configuration 74HC_HCT366_Q100 Product data sheet 74HC366-Q100; 74HCT366-Q100 buffer/line driver buffer/line driver 2 3A buffer/line driver 3 4A buffer/line driver 4 5A buffer/line driver 5 6A buffer/line driver 6 +&4 +&74 2 2( < ...
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... NXP Semiconductors 5.2 Pin description Table 2. Pin description Symbol Pin OE1 GND OE2 Functional description [1] Table 3. Function table Control OE1 OE2 [ HIGH voltage level; ...
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... NXP Semiconductors 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter V supply voltage CC I input clamping current IK I output clamping current OK I output current O I supply current CC I ground current ...
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... NXP Semiconductors 9. Static characteristics Table 6. Static characteristics 74HC366-Q100 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter = 25 C T amb V HIGH-level input voltage IH V LOW-level input voltage IL V HIGH-level output voltage LOW-level output voltage input leakage current I I OFF-state output current ...
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... NXP Semiconductors Table 6. Static characteristics 74HC366-Q100 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter V LOW-level output voltage input leakage current I I OFF-state output current OZ I supply current CC = 40 C to +125 C T amb V HIGH-level input voltage IH V LOW-level input voltage ...
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... NXP Semiconductors Table 7. Static characteristics 74HCT366-Q100 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter V LOW-level output OL voltage I input leakage current I I OFF-state output current supply current CC I additional supply current input capacitance I = 40 C to +85 C ...
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... NXP Semiconductors Table 7. Static characteristics 74HCT366-Q100 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter I supply current CC I additional supply current V CC 10. Dynamic characteristics Table 8. Dynamic characteristics 74HC366-Q100 Voltages are referenced to GND (ground = 0 V); C Symbol Parameter = 25 C T amb t propagation delay ...
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... NXP Semiconductors Table 8. Dynamic characteristics 74HC366-Q100 Voltages are referenced to GND (ground = 0 V); C Symbol Parameter t disable time dis t transition time t = 40 C to +125 C T amb t propagation delay pd t enable time en t disable time dis t transition time t [ the same as t and t ...
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... NXP Semiconductors Table 9. Dynamic characteristics 74HCT366-Q100 Voltages are referenced to GND (ground = 0 V); C Symbol Parameter = 25 C T amb t propagation delay pd t enable time en t disable time dis t transition time t C power dissipation PD capacitance = 40 C to +85 C T amb t propagation delay pd t enable time ...
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... NXP Semiconductors 11. Waveforms Measurement points are given in V and V are typical output voltage levels that occur with the output load Fig 6. Propagation delay data input (nA) to output (nY) and output transition time OEn input nY output LOW-to-OFF OFF-to-LOW nY output HIGH-to-OFF ...
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... NXP Semiconductors Test data is given in Table Definitions test circuit Termination resistance should be equal to output impedance Load capacitance including jig and probe capacitance Load resistor Test selection switch Fig 8. Load circuitry for measuring switching times Table 11. Test data Type ...
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... NXP Semiconductors 12. Package outline SO16: plastic small outline package; 16 leads; body width 3 pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.069 0.01 0.004 0.049 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...
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... NXP Semiconductors TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...
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... NXP Semiconductors 13. Abbreviations Table 12. Abbreviations Acronym Description CMOS Complementary Metal Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model LSTTL Low-power Schottky Transistor-Transistor Logic MM Machine Model MIL Military 14. Revision history Table 13. Revision history Document ID Release date 74HC_HCT366_Q100 v.1 20120807 ...
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... Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...
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... NXP Semiconductors No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations ...
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... NXP Semiconductors 17. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 6 Functional description . . . . . . . . . . . . . . . . . . . 4 7 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 9 11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 14 13 Abbreviations ...