C8051F710-GQR Silicon Labs, C8051F710-GQR Datasheet - Page 295
C8051F710-GQR
Manufacturer Part Number
C8051F710-GQR
Description
8-bit Microcontrollers - MCU 8kB ADC Cap Sense
Manufacturer
Silicon Labs
Datasheet
1.C8051F709-GQR.pdf
(306 pages)
Specifications of C8051F710-GQR
Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
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34.4. Register Descriptions for PCA0
Following are detailed descriptions of the special function registers related to the operation of the PCA.
SFR Definition 34.1. PCA0CN: PCA Control
SFR Address = 0xD8; SFR Page = All Pages; Bit-Addressable
Name
Reset
Bit
5:3
2:0
Type
7
6
Bit
CCF[2:0] PCA Module n Capture/Compare Flag.
Unused
Name
CR
CF
R/W
CF
7
0
PCA Counter/Timer Overflow Flag.
Set by hardware when the PCA Counter/Timer overflows from 0xFFFF to 0x0000.
When the Counter/Timer Overflow (CF) interrupt is enabled, setting this bit causes the
CPU to vector to the PCA interrupt service routine. This bit is not automatically cleared
by hardware and must be cleared by software.
PCA Counter/Timer Run Control.
This bit enables/disables the PCA Counter/Timer.
0: PCA Counter/Timer disabled.
1: PCA Counter/Timer enabled.
Read = 000b; Write = Don’t care
These bits are set by hardware when a match or capture occurs in the associated PCA
Module n. When the CCFn interrupt is enabled, setting this bit causes the CPU to
vector to the PCA interrupt service routine. This bit is not automatically cleared by
hardware and must be cleared by software.
R/W
CR
6
0
R
5
0
Rev. 1.0
R
4
0
Function
R
3
0
CCF2
R/W
C8051F70x/71x
2
0
CCF1
R/W
1
0
CCF0
R/W
0
0
295
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