C8051F540-IMR Silicon Labs, C8051F540-IMR Datasheet - Page 85

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C8051F540-IMR

Manufacturer Part Number
C8051F540-IMR
Description
8-bit Microcontrollers - MCU 50 MIPS 16 kB 1 kB LIN 2.1 SPI
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051F540-IMR

Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
11. Memory Organization
The memory organization of the CIP-51 System Controller is similar to that of a standard 8051. There are
two separate memory spaces: program memory and data memory. Program and data memory share the
same address space but are accessed via different instruction types. The memory organization is shown in
Figure 11.1
11.1. Program Memory
The CIP-51 core has a 64 kB program memory space. The C8051F54x devices implement 16 kB or 8 kB
of this program memory space as in-system, re-programmable Flash memory, organized in a contiguous
block from addresses 0x0000 to 0x3FFF in 16 kB devices and addresses 0x0000 to 0x1FFF in 8 kB
devices. The address 0x3BFF in 16 kB devices and 0x1FFF in 8 kB devices serves as the security lock
byte for the device. Addresses above 0x3BFF are reserved in the 16 kB devices.
0x1FFF
0x0000
0x3BFF
0x3C00
0x0000
PROGRAM/DATA MEMORY
Programmable in 512
Programmable in 512
C8051F544/5/6/7
(FLASH)
C8051F540/1/2/3
Byte Sectors)
16 kB FLASH
Byte Sectors)
8 kB FLASH
RESERVED
(In-System
(In-System
Figure 11.1. C8051F54x Memory Map
0xFF
0x7F
0x2F
0x1F
0x80
0x30
0x20
0x00
Rev. 1.1
(Indirect Addressing
(Direct and Indirect
INTERNAL DATA ADDRESS SPACE
EXTERNAL DATA ADDRESS SPACE
General Purpose
Upper 128 RAM
Bit Addressable
Addressing)
0xFFFF
0x03FF
Registers
0x0400
0x0000
Only)
DATA MEMORY (RAM)
from 0x0000 to 0x03FF,
wrapped on 1024-byte
Same 1024 bytes as
MOVX instruction)
(accessable using
1K Bytes
boundaries
XRAM
(Direct Addressing Only)
C8051F54x
Special Function
Lower 128 RAM
(Direct and Indirect
Addressing)
Register's
85

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