C8051F556-IMR Silicon Labs, C8051F556-IMR Datasheet - Page 103
C8051F556-IMR
Manufacturer Part Number
C8051F556-IMR
Description
8-bit Microcontrollers - MCU 50 MIPS 16 kB 2 kB LIN 2.1 SPI
Manufacturer
Silicon Labs
Datasheet
1.C8051F556-IMR.pdf
(302 pages)
Specifications of C8051F556-IMR
Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
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SFR Definition 12.2. SFRPAGE: SFR Page
SFR Address = 0xA7; SFR Page = All Pages
Bit
7:0
Name
Reset
Type
Bit
SFRPAGE[7:0]
Name
7
0
SFR Page Bits.
Represents the SFR Page the C8051 core uses when reading or modifying
SFRs.
Write: Sets the SFR Page.
Read: Byte is the SFR page the C8051 core is using.
When enabled in the SFR Page Control Register (SFR0CN), the C8051 core will
automatically switch to the SFR Page that contains the SFRs of the correspond-
ing peripheral/function that caused the interrupt, and return to the previous SFR
page upon return from interrupt (unless SFR Stack was altered before a return-
ing from the interrupt). SFRPAGE is the top byte of the SFR Page Stack, and
push/pop events of this stack are caused by interrupts (and not by reading/writ-
ing to the SFRPAGE register)
6
0
5
0
Rev. 1.1
SFRPAGE[7:0]
4
0
R/W
Function
3
0
C8051F55x/56x/57x
2
0
1
0
0
0
103
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