C8051F712-GMR Silicon Labs, C8051F712-GMR Datasheet - Page 153
C8051F712-GMR
Manufacturer Part Number
C8051F712-GMR
Description
8-bit Microcontrollers - MCU 8kB 32B EEPROM ADC Cap Sense
Manufacturer
Silicon Labs
Datasheet
1.C8051F709-GQR.pdf
(306 pages)
Specifications of C8051F712-GMR
Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
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SFR Definition 22.1. PSCTL: Program Store R/W Control
SFR Address =0x8F; SFR Page = All Pages
Name
Reset
Bit
7:2
Type
1
0
Bit
Unused
PSWE
Name
PSEE
R
7
0
Read = 000000b, Write = don’t care.
Program Store Erase Enable.
Setting this bit (in combination with PSWE) allows an entire page of Flash program
memory to be erased. If this bit is logic 1 and Flash writes are enabled (PSWE is logic
1), a write to Flash memory using the MOVX instruction will erase the entire page that
contains the location addressed by the MOVX instruction. The value of the data byte
written does not matter.
0: Flash program memory erasure disabled.
1: Flash program memory erasure enabled.
Program Store Write Enable.
Setting this bit allows writing a byte of data to the Flash program memory using the
MOVX write instruction. The Flash location should be erased before writing data.
0: Writes to Flash program memory disabled.
1: Writes to Flash program memory enabled; the MOVX write instruction targets Flash
memory.
R
6
0
R
5
0
Rev. 1.0
R
4
0
Function
R
3
0
C8051F70x/71x
R
2
0
PSEE
R/W
1
0
PSWE
R/W
0
0
153
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