MAX9502GEVKIT+ Maxim Integrated, MAX9502GEVKIT+ Datasheet - Page 4

• Manufacturer Part Number: MAX9502GEVKIT+
• Description: Video Amplifiers Evaluation Kit for the MAX9502G/MAX9502M
• Manufacturer: Maxim Integrated

Specifications of MAX9502GEVKIT+

• Supply Current: 5.3 mA
• Maximum Power Dissipation: 168 mW
• Snr: 68 dB
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 2.5 V

Jumper JU2 controls the shutdown pin (SHDN) of the
MAX9502GELT IC, and jumper JU3 controls the shut-
down pin (SHDN) of the MAX9502GEXK IC. The ICs are
also controlled by an external logic signal connected to
the jumpers. Remove the shunt from the jumper before
connecting the external logic signal. Connect the logic
signal to the center pin of the jumper (pin 2) and the
logic signal return pin to GND (pin 3). When the logic
signal is low, the MAX9502G/MAX9502M shuts down.
When the logic signal is high, the MAX9502G/
MAX9502M is in normal operation. Refer to the
MAX9502 data sheet for additional information.
The MAX9502G/MAX9502M feature an internal recon-
struction filter that has 3dB attenuation at 8MHz, 55dB
attenuation at 27MHz, and ±1dB passband flatness
to 5.5MHz. The MAX9502G has +6dB gain, while the
MAX9502M has +12dB gain. The MAX9502G dual-
package EV kit’s video input and output signals are
DC-coupled, eliminating large DC-blocking capacitors.
The EV kit’s input terminal has a 75Ω termination to
ground, and the output has a 75Ω back-termination
resistor.
The MAX9502G dual-package EV kit also evaluates the
MAX9502M by replacing the IC. See Evaluating the
MAX9502M section for additional information.
The input video signal to the MAX9502G must be
approximately within the range of 0 to 1V for the
MAX9502G and 0 to 0.6V for the MAX9502M, as the
MAX9502G/MAX9502M were designed to interface to
video DACs, which output a video signal in those
ranges. If the video signal source used to evaluate the
MAX9502G creates a signal with the sync pulse below
ground, then the signal must be level-shifted up, such
that the sync tip is at ground.
Note in the two CVBS waveforms shown in Figures 1
and 2 that one is correctly level-shifted and the other is
not. Figure 1 shows the correct input signal for the
MAX9502G IC, typically from a video DAC. Marker 1 in
the photograph indicates ground and the cursors indi-
cate a 1V
signal for the MAX9502G IC, as the signal swings
below ground. Marker 1 in the photograph indicates
ground and the cursors indicate a 1V
The level-shift circuit, as shown in Figure 3, changes
the DC bias of a video signal. If the video source can-
not supply a video signal with the sync tip at ground,
the following circuit level-shifts the video signal. Simply
apply the video signal to J1 and adjust R10 so that the
sync tip waveform at J2 is at ground.
MAX9502G Dual-Package Evaluation Kit
4
______________________________________________________________________________________
P-P
signal. Figure 2 shows the incorrect input
CVBS Signal Source
Level-Shift Circuit
P-P
signal.
To evaluate the MAX9502M 6-pin µDFN package,
replace U1 with a MAX9502MELT+T. To evaluate the
MAX9502M 5-pin SC70 package, replace U2 with a
MAX9502MEXK+T.
The MAX9502M has identical pinout and internal fea-
tures as the MAX9502G, except the amplifier gain is
+12dB. Refer to the MAX9502 data sheet for additional
information.
Jumpers JU1 and JU4 control the I/O signal selection.
Only one MAX9502G/MAX9502M IC can be tested at a
time. See Table 1 for shunt positions.
Jumpers JU2 and JU3 control the shutdown mode
(SHDN) of the MAX9502G/MAX9502M ICs. In the shut-
down mode, the quiescent current of the IC is typically
10nA. See Table 2 for shunt positions.
Table 2. JU2/JU3 Jumper Selection
*Default position.
Table 1. JU1/JU4 Jumper Selection
*Default position.
connected to center
connected to center
pin (2) and GND (3)
pin (2) and GND (3)
JUMPER
SHUNT POSITION
Logic controller
Logic controller
JU1
JU1
JU4
JU4
JU1/JU4 Jumper Selection—I/O Signals
JU2/JU3 Jumper Selection—Shutdown
1-2*
2-3
POSITION
SHUNT
1-2*
1-2*
2-3
2-3
Logic level high
Input signal applied to U1 (µDFN)
Input signal applied to U2 (SC70)
O utp ut si g nal sour ced fr om U 1 ( µD FN )
Output signal sourced from U2 (SC70)
Logic level low
Evaluating the MAX9502M
SHDN PIN
Logic level
Logic level
(+3VDC)
(0VDC)
high
low
FUNCTION
(low-power mode)
Mode ( SHDN )
Device disabled
Device enabled
FUNCTION
disabled
enabled
Device
Device