C8051F987-GMR Silicon Labs, C8051F987-GMR Datasheet - Page 200

• Manufacturer Part Number: C8051F987-GMR
• Description: 8-bit Microcontrollers - MCU 8kB 512B RAM
• Manufacturer: Silicon Labs

Specifications of C8051F987-GMR

• Rohs: yes
• Core: 8051
• Processor Series: C8051
• Data Bus Width: 8 bit

C8051F99x-C8051F98x
SFR Definition 20.2. RTC0ADR: SmaRTClock Address
SFR Page = 0x0; SFR Address = 0xAC
SFR Definition 20.3. RTC0DAT: SmaRTClock Data
SFR Page= 0x0; SFR Address = 0xAD
200
Note: The ADDR bits increment after each indirect read/write operation that targets a CAPTUREn or ALARMn
Note: Read-modify-write instructions (orl, anl, etc.) should not be used on this register.
Name
Reset
Name
Reset
Type
Type
3:0
7:0
Bit
Bit
Bit
Bit
7
6
5
4
internal SmaRTClock register.
ADDR[3:0] SmaRTClock Indirect Register Address.
RTC0DAT SmaRTClock Data Bits.
AUTORD SmaRTClock Interface Autoread Enable.
Unused
SHORT
BUSY
Name
BUSY
Name
R/W
7
0
7
0
SmaRTClock Interface Busy Indicator.
Indicates SmaRTClock interface status. Writing 1 to this bit initiates an indirect read.
Enables/disables Autoread.
0: Autoread Disabled.
1: Autoread Enabled.
Read = 0b; Write = Don’t Care.
Short Strobe Enable.
Enables/disables the Short Strobe Feature.
0: Short Strobe disabled.
1: Short Strobe enabled.
Sets the currently selected SmaRTClock register.
See Table 20.1 for a listing of all SmaRTClock indirect registers.
Holds data transferred to/from the internal SmaRTClock register selected by
RTC0ADR.
AUTORD
R/W
6
0
6
0
R
5
0
5
0
SHORT
R/W
Rev. 1.1
RTC0DAT[7:0]
4
0
4
0
R/W
Function
Function
3
0
3
0
2
0
2
0
ADDR[3:0]
R/W
1
0
1
0
0
0
0
0