SAP51C-B-G1-R ZMDI, SAP51C-B-G1-R Datasheet - Page 46

• Manufacturer Part Number: SAP51C-B-G1-R
• Description: Interface - Specialized ASI
• Manufacturer: ZMDI

Specifications of SAP51C-B-G1-R

• Rohs: yes
• Product Type: Actuator Sensor Interface IC
• Operating Supply Voltage: 16 V to 34 V
• Supply Current: 6 mA
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SOP-16
• Minimum Operating Temperature: - 25 C

4.14. UART
The UART performs a syntactical and timing wise analysis of the received telegrams at the AS-i input channel.
It converts the pulse coded AS-i input signal into a Manchester-II-coded bit stream and provides the receive
register with decoded telegram bits. The UART also realizes the Manchester-II-coding of a slave answer.
In Master/Repeater Mode the output signal of the Manchester coder (AS-i pulse to MAN signal conversion) is
resynchronized and forwarded to pin LED1. Any pulse timing jitters of the received AS-i signal become
removed, as long as they stay within the specified maximum limits. If the received AS-i telegram does not
pass one of the different error checks (see detailed description below), the LED1 output the output becomes
inactive for a certain time periode, see chapter 4.19.3.
The comparator stages at the AS-i-line receiver generate two pulse-coded output signals (p_pulse, n_pulse)
disjoining the positive and negative telegram pulses for further processing. To reduce UART sensitivity on
erroneous spike pulses, pulse filters suppress any p_pulse, n_pulse activity of less than 750 ns width. After
filtering, the p_pulse and n_pulse signals are checked in accordance with the AS-i Complete Specification for
following telegram transmission errors:
Start_bit_error
Alternating_error
Timing_error
No_information_error
Parity_error
End_bit_error
Length_error
Data Sheet
October 20, 2011
SAP5S / SAP51
Universal Actuator-Sensor Interface IC
© 2011 Zentrum Mikroelektronik Dresden AG — Rev. 3.0
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without
the prior written consent of the copyright owner. The information furnished in this publication is PRELIMINARY and subject to
changes without notice.
The initial pulse following a pause must have negative polarity. Violation of this rule is
detected as Start_bit_error. The first pulse is the reference for bit decoding. The first
bit detected shall be of the value 0.
Two consecutive pulses must have different polarity. Violation of this rule is detected
as Alternating_error.
Note: A negative pulse shall be followed by a positive pulse and vice versa.
Within any master request or slave response, the digital pulses that are generated by
the receiver are checked to start in periods of
initial negative pulse, where n = 1 ... 26 for a master request and n = 1 ... 12 for a
slave response. Violation of this rule is detected as Timing_error.
Note: There is a certain pulse timing jitter associated with the receiver output signals
(compared to the analog signal waveform) due to sampling and offset effects at the
comparator stages. In order to take the jitter effects into account, the timing tolerance
specifications differ slightly from the definitions of the AS-i Complete Specification.
Derived from the Manchester-II-Coding rule, either a positive or negative pulse shall
be detected in periods of
where n = 1 ... 13 for a master request and n = 1 ... 6 for a slave response. Violation of
this rule is detected as No_information_error.
Note: The timing specification relates to the receiver comparator output signals. There
is a certain pulse timing jitter in the digital output signals (compared to the analog
signal waveform) due to sampling and offset effects at the comparator stages. In order
to take the jitter effects into account, the timing tolerance specifications differ slightly
from the definitions of the AS-i Complete Specification.
The sum of all information bits in master requests or slave responses (excluding start
and end bits, including parity bit) must be even. Violation of this rule is detected as
Parity_error.
The pulse to be detected
polarity, where n = 13 (78 s) for a master request and n = 6 (36 s) for a slave
response. Violation of this rule shall be detected as an End_bit_error.
Note: This stop pulse shall finish a master request or slave response.
Telegram length supervision is processed as follows. If during the first bit time after
the end pulse of a master request (equivalent to the 15
slaves (during the first three bit times for not synchronized slaves, equivalent to the Bit
times 15 to 17) or during the first bit time after the end pulse of a slave response
(equivalent to the 8
Length_error is detected.
th
Bit time) a signal different from a pause is detected, a
(
(
n
n
*
*
6
6


s
s
)
)




. 1
. 0
. 1
. 0
500
875
500
875




s
s
s
s
after the start of the initial negative pulse,
after the start pulse shall be of positive
(
n
*
3

s
)
th


. 1
. 0
Bit time) for synchronized
500
875


s
s
after the start of the
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