TJA1028T/5V0/10 NXP Semiconductors, TJA1028T/5V0/10 Datasheet
TJA1028T/5V0/10
Specifications of TJA1028T/5V0/10
Available stocks
Related parts for TJA1028T/5V0/10
TJA1028T/5V0/10 Summary of contents
Page 1
TJA1028 LIN transceiver with integrated voltage regulator Rev. 4 — 25 July 2012 1. General description The TJA1028 is a LIN 2.0/2.1/SAE J2602 transceiver with an integrated low-drop voltage regulator. The voltage regulator can deliver and ...
Page 2
... TJA1028T/xxx/20 and TJA1028TK/xxx/20 for the normal slope versions that support baud rates kBd; TJA1028T/xxx/10 and TJA1028TK/xxx/10 for the low slope versions that support baud rates up to 10.4 kBd (SAE J2602). 4. Marking Table 2. Type number TJA1028T/5V0/10 TJA1028T/5V0/20 TJA1028T/3V3/10 TJA1028T/3V3/20 TJA1028TK/5V0/10 TJA1028TK/5V0/20 TJA1028TK/3V3/10 ...
Page 3
... NXP Semiconductors 5. Block diagram Fig 1. TJA1028 Product data sheet LIN transceiver with integrated voltage regulator VOLTAGE REFERENCE OVERTEMP DETECTION V BAT LIN TJA1028 Block diagram All information provided in this document is subject to legal disclaimers. Rev. 4 — 25 July 2012 TJA1028 V BAT V BAT UV DET V CC ...
Page 4
... NXP Semiconductors 6. Pinning information 6.1 Pinning a. TJA1028T/xxx/xx: SO8 Fig 2. 6.2 Pin description Table 3. Symbol V BAT EN GND LIN RXD TXD RSTN V CC [1] For enhanced thermal and electrical performance, the exposed center pad of the HVSON8 package should be soldered to board ground (and not to any other voltage level). ...
Page 5
... NXP Semiconductors The TJA1028T/xxx/20 and TJA1028TK/xxx/20 versions are optimized for a transmission speed of 20 kBd, the maximum specified in the LIN standard. The TJA1028T/xxx/10 and TJA1028TK/xxx/10 versions are optimized for a transmission speed of 10.4 kBd, as specified in SAE J2602. All versions achieve optimum ElectroMagnetic Compatibility (EMC) performance by wave shaping the LIN output. ...
Page 6
... NXP Semiconductors 7.2.1 Off mode The TJA1028 switches to Off mode from all other modes if the battery supply voltage drops below the power-off detection threshold (V exceeds the overtemperature protection activation threshold (T The voltage regulator and the LIN physical layer are disabled in Off mode, and pin RSTN is forced LOW ...
Page 7
... NXP Semiconductors 7.2.5 Transition from Normal to Sleep or Standby mode When EN is driven LOW in Normal mode, the TJA1028 disables the transmit path. The mode select window opens t after EN goes LOW (see The TXD pin is sampled in the mode select window. A transition to Standby mode is triggered if TXD is HIGH Sleep mode if TXD is LOW. ...
Page 8
... NXP Semiconductors 7.3.3 Reset (pin RSTN) The output voltage on pin V generated (pin RSTN goes LOW undervoltage event is detected (V t det(uv)(VCC) undervoltage recovery threshold (V 7.4 LIN transceiver The transceiver is the interface between a LIN master/slave protocol controller and the physical bus in a LIN network primarily intended for in-vehicle sub-networks using baud rates from 2 ...
Page 9
... NXP Semiconductors • After a transition to Normal mode, the LIN transmitter is only enabled if a recessive level is present on pin TXD. 7.6.2 TXD dominant time-out function A TXD dominant time-out timer circuit prevents the bus line being driven to a permanent dominant state (blocking all network communications) if TXD is forced permanently LOW by a hardware or software application failure ...
Page 10
... NXP Semiconductors [3] ESD performance of pins LIN and V Machine Model (MM): according to AEC-Q100-003 (200 pF, 0.75 H, 10 ). [4] [5] Charged Device Model (CDM): according to AEC-Q100-011 (field induced charge; 4 pF). [6] Verified by an external test house to ensure pins can withstand ISO 7637 part 2 automotive transient test pulses 1, 2a, 3a and 3b. ...
Page 11
... NXP Semiconductors Table 6. Static characteristics 5 +150 BAT vj currents flow into the IC; typical values are given at V Symbol Parameter V undervoltage detection uvd voltage V undervoltage recovery uvr voltage R resistance between pin V (VBAT-VCC) and pin output capacitance o LIN transmit data input ...
Page 12
... NXP Semiconductors Table 6. Static characteristics 5 +150 BAT vj currents flow into the IC; typical values are given at V Symbol Parameter V receiver recessive state BUSrec V receiver dominant state BUSdom V receiver center voltage BUS_CNT V receiver hysteresis voltage HYS V voltage drop at the serial ...
Page 13
... NXP Semiconductors R (VBAT-VCC)(typ) Fig 6. 11. Dynamic characteristics Table 7. Dynamic characteristics 5 +150 BAT vj currents flow into the IC; typical values are given at V Symbol Parameter Duty cycles 1 duty cycle 1 2 duty cycle 2 3 duty cycle 3 ...
Page 14
... NXP Semiconductors Table 7. Dynamic characteristics 5 +150 BAT vj currents flow into the IC; typical values are given at V Symbol Parameter 4 duty cycle 4 Timing characteristics t receiver propagation delay rx_pd t receiver propagation delay symmetry rx_sym t LIN dominant wake-up time ...
Page 15
... NXP Semiconductors V TXD LIN bus V BAT signal output of receiving V RXD node A output of receiving V RXD node B Fig 8. LIN transceiver timing diagram 12. Test information 12.1 Quality information This product has been qualified in accordance with the Automotive Electronics Council (AEC) standard Q100 - Failure mechanism based stress test qualification for integrated circuits, and is suitable for use in automotive applications ...
Page 16
... NXP Semiconductors 13. Package outline SO8: plastic small outline package; 8 leads; body width 3 pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.069 0.01 0.004 0.049 Notes 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...
Page 17
... NXP Semiconductors HVSON8: plastic thermal enhanced very thin small outline package; no leads; 8 terminals; body 0. terminal 1 index area terminal 1 index area Dimensions (1) Unit max 1.00 0.05 0.35 mm nom 0.85 0.03 0.30 0.2 min 0.80 0.00 0.25 Note 1. Plastic or metal protrusions of 0.075 maximum per side are not included. ...
Page 18
... NXP Semiconductors 14. Handling information All input and output pins are protected against ElectroStatic Discharge (ESD) under normal handling. When handling ensure that the appropriate precautions are taken as described in JESD625-A or equivalent standards. 15. Soldering of SMD packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “ ...
Page 19
... NXP Semiconductors • Process issues, such as application of adhesive and flux, clinching of leads, board transport, the solder wave parameters, and the time during which components are exposed to the wave • Solder bath specifications, including temperature and impurities 15.4 Reflow soldering Key characteristics in reflow soldering are: • ...
Page 20
... NXP Semiconductors Fig 11. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description”. 16. Soldering of HVSON packages Section 15 Surface Mounted Devices (SMD). A more detailed discussion on soldering HVSON leadless package ICs can found in the following application notes: • ...
Page 21
... NXP Semiconductors 17. Revision history Table 10. Revision history Document ID Release date TJA1028 v.4 20120725 • Modifications: Table 5: text of table note section amended • Table 3: text of table note amended • Section 2, • Section 7.1, • Figure 1, Figure • Table 6: parameters values/conditions changed: V TJA1028 v.3 20110519 TJA1028 v.2 20100225 TJA1028 v ...
Page 22
... Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...
Page 23
... NXP Semiconductors No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations ...
Page 24
... NXP Semiconductors 20. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 7 Functional description . . . . . . . . . . . . . . . . . . . 4 7.1 LIN 2.x/SAE J2602 compliant . . . . . . . . . . . . . . 5 7.2 Operating modes . . . . . . . . . . . . . . . . . . . . . . . 5 7.2.1 Off mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 7.2.2 Standby mode 7.2.3 Normal mode . . . . . . . . . . . . . . . . . . . . . . . . . . 6 7.2.3.1 The LIN transceiver in Normal mode . . . . . . . . 6 7 ...