ISL28207FUZ-T7A Intersil, ISL28207FUZ-T7A Datasheet - Page 20

no-image

ISL28207FUZ-T7A

Manufacturer Part Number
ISL28207FUZ-T7A
Description
Operational Amplifiers - Op Amps ISL28207FUZ DUAL PRE MICROPWR OPERTNL AM
Manufacturer
Intersil
Datasheet

Specifications of ISL28207FUZ-T7A

Product Category
Operational Amplifiers - Op Amps
Rohs
yes
Number Of Channels
2
Common Mode Rejection Ratio (min)
115 dB
Input Offset Voltage
110 uV
Input Bias Current (max)
600 pA
Operating Supply Voltage
4.5 V to 40 V, +/- 2.25 V to +/- 20 V
Mounting Style
SMD/SMT
Package / Case
MSOP-8
Slew Rate
0.32 V/us
Shutdown
No
Output Current
40 mA
Maximum Operating Temperature
+ 125 C
Gain Bandwidth Product
1 MHz
Maximum Dual Supply Voltage
+/- 20 V
Minimum Dual Supply Voltage
+/- 2.25 V
Minimum Operating Temperature
- 40 C
Supply Current
0.29 mA
Technology
BiCOM
Voltage Gain Db
152 dB
The resistor-ESD diode configuration enables a wide differential
input voltage range equal to the lesser of the Maximum Supply
Voltage in the “Absolute Maximum Ratings” on page 6 (42V), or a
maximum of 0.5V beyond the V+ and V- supply voltage. The
internal protection resistors eliminate the need for external input
current limiting resistors in unity gain connections and other
circuit applications where large voltages or high slew rate signals
are present. Although the amplifier is fully protected, high input
slew rates that exceed the amplifier slew rate (±0.32V/µs) may
cause output distortion.
Output Current Limiting
The output current is internally limited to approximately ±40mA
at +25°C and can withstand a short circuit to either rail as long
as the power dissipation limits are not exceeded. This applies to
only one amplifier at a time for the dual op-amp. Continuous
operation under these conditions may degrade long-term
reliability.
Output Phase Reversal
Output phase reversal is a change of polarity in the amplifier
transfer function when the input voltage exceeds the supply
voltage. The ISL28107, ISL28207 and ISL28407 are immune to
output phase reversal, even when the input voltage is 1V beyond
the supplies.
Unused Channels
If the application only requires one channel, the user must
configure the unused channels to prevent them from oscillating.
The unused channels can oscillate if the input and output pins
are floating. This results in higher than expected supply currents
and possible noise injection into the channel being used. The
proper way to prevent this oscillation is to short the output to the
inverting input and ground the positive input, as shown in
Figure 55.
Power Dissipation
It is possible to exceed the +150°C maximum junction
temperatures under certain load and power supply conditions. It
is therefore important to calculate the maximum junction
temperature (T
supply voltages, load conditions, or package type need to be
modified to remain in the safe operating area. These parameters
are related using Equation 1:
where:
• P
T
JMAX
each amplifier in the package (PD
FIGURE 55. PREVENTING OSCILLATIONS IN UNUSED CHANNELS
DMAXTOTAL
=
T
MAX
is the sum of the maximum power dissipation of
JMAX
+
θ
JA
) for all applications to determine if power
xPD
MAXTOTAL
+
20
-
MAX
ISL28107, ISL28207, ISL28407
)
(EQ. 1)
PD
PD
where:
• T
• θ
• PD
• V
• I
• V
• R
ISL28107, ISL28207, ISL28407 SPICE Model
Figure 56 shows the SPICE model schematic, and Figure 57 shows
the net list for the ISL28107, ISL28207 and ISL28407 SPICE
model. The model is a simplified version of the actual device and
simulates important AC and DC parameters. AC parameters
incorporated into the model are: 1/f and flatband noise, Slew
Rate, CMRR, Gain and Phase. The DC parameters are VOS, IOS,
total supply current and output voltage swing. The model uses
typical parameters given in the “Electrical Specifications” table
beginning on page 6. A
dominant pole at 0.01Hz. CMRR is set (145dB, f
input stage models the actual device to present an accurate AC
representation. The model is configured for ambient temperature
of +25°C.
Figures 58 through 68 show the characterization vs simulation
results for the Noise Voltage, Closed Loop Gain vs Frequency,
Closed Loop Gain vs R
Gain Phase and Simulated CMRR vs Frequency.
License Statement
The information in this SPICE model is protected under the
United States copyright laws. Intersil Corporation hereby grants
users of this macro-model hereto referred to as “Licensee”, a
nonexclusive, nontransferable licence to use this model as long
as the Licensee abides by the terms of this agreement. Before
using this macro-model, the Licensee should read this license. If
the Licensee does not accept these terms, permission to use the
model is not granted.
The Licensee may not sell, loan, rent, or license the macro-model,
in whole, in part, or in modified form, to anyone outside the
Licensee’s company. The Licensee may modify the macro-model
to suit his/her specific applications, and the Licensee may make
copies of this macro-model for use within their company only.
This macro-model is provided “AS IS, WHERE IS, AND WITH NO
WARRANTY OF ANY KIND EITHER EXPRESSED OR IMPLIED,
INCLUDING BUY NOT LIMITED TO ANY IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.”
In no event will Intersil be liable for special, collateral, incidental, or
consequential damages in connection with or arising out of the
use of this macro-model. Intersil reserves the right to make
changes to the product and the macro-model without prior notice.
MAX
qMAX
MAX
MAX
JA
S
OUTMAX
L
MAX
= Total supply voltage
= Load resistance
= Thermal resistance of the package
for each amplifier can be calculated using Equation 2:
= Maximum ambient temperature
= Maximum quiescent supply current of one amplifier
=
= Maximum power dissipation of one amplifier
V
= Maximum output voltage swing of the application
S
×
I
qMAX
+
L
VOL
, Large Signal Step Response, Open Loop
(
V
S
is adjusted for 155dB with the
- V
OUTMAX
)
×
V
--------------------------- -
OUTMAX
R
cm
L
= 100Hz). The
February 25, 2013
FN6631.7
(EQ. 2)

Related parts for ISL28207FUZ-T7A