74AHC1G08GW-Q100 NXP Semiconductors, 74AHC1G08GW-Q100 Datasheet
74AHC1G08GW-Q100
Specifications of 74AHC1G08GW-Q100
Available stocks
Related parts for 74AHC1G08GW-Q100
74AHC1G08GW-Q100 Summary of contents
Page 1
... SOT353-1 and SOT753 package options 3. Ordering information Table 1. Ordering information Type number Package Temperature range 40 C to +125 C 74AHC1G08GW-Q100 74AHCT1G08GW-Q100 40 C to +125 C 74AHC1G08GV-Q100 74AHCT1G08GV-Q100 Name Description TSSOP5 plastic thin shrink small outline package; 5 leads; body width 1.25 mm SC-74A plastic surface-mounted package ...
Page 2
... NXP Semiconductors 4. Marking Table 2. Marking codes Type number 74AHC1G08GW-Q100 74AHC1G08GV-Q100 74AHCT1G08GW-Q100 74AHCT1G08GV-Q100 [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram mna113 Fig 1. Logic symbol 6. Pinning information 6.1 Pinning Fig 4. Pin configuration 6 ...
Page 3
... NXP Semiconductors 7. Functional description Table 4. Function table H = HIGH voltage level LOW voltage level Inputs Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter V supply voltage CC V input voltage I I input clamping current ...
Page 4
... NXP Semiconductors 10. Static characteristics Table 7. Static characteristics Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions For type 74AHC1G08-Q100 V HIGH-level input voltage LOW-level input voltage HIGH-level output voltage = 50 A; V ...
Page 5
... NXP Semiconductors Table 7. Static characteristics Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions I supply current 5 I additional per input pin supply current other inputs input I capacitance 11. Dynamic characteristics Table 8. Dynamic characteristics ...
Page 6
... NXP Semiconductors 12. Waveforms Measurement points are given in Fig 5. Input (A and B) to output (Y) propagation delays Table 9. Measurement point Type Input V 74AHC1G08-Q100 GND to V 74AHCT1G08-Q100 GND to 3.0 V Test data is given in Table C = Load capacitance including jig and probe capacitance Termination resistance should be equal to output impedance Z T Fig 6 ...
Page 7
... NXP Semiconductors 13. Package outline TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1. DIMENSIONS (mm are the original dimensions UNIT max. 0.1 1.0 mm 1.1 0.15 0 0.8 Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE ...
Page 8
... NXP Semiconductors Plastic surface-mounted package; 5 leads DIMENSIONS (mm are the original dimensions) UNIT 0.100 1.1 0.40 0.26 mm 0.013 0.9 0.25 0.10 OUTLINE VERSION IEC SOT753 Fig 8. Package outline SOT753 (SC-74A) 74AHC_AHCT1G08_Q100 Product data sheet 74AHC1G08-Q100; 74AHCT1G08-Q100 scale ...
Page 9
... NXP Semiconductors 14. Abbreviations Table 10. Abbreviations Acronym Description CDM Charged Device Model DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic MIL Military 15. Revision history Table 11. Revision history Document ID Release date 74AHC_AHCT1G08_Q100 v.1 20120713 74AHC_AHCT1G08_Q100 Product data sheet 74AHC1G08-Q100 ...
Page 10
... Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...
Page 11
... NXP Semiconductors No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations ...
Page 12
... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 4 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 2 7 Functional description . . . . . . . . . . . . . . . . . . . 3 8 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 5 12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 13 Package outline ...