74HCT573D-T NXP Semiconductors, 74HCT573D-T Datasheet
74HCT573D-T
Specifications of 74HCT573D-T
Related parts for 74HCT573D-T
74HCT573D-T Summary of contents
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Octal D-type transparent latch; 3-state Rev. 5 — 15 August 2012 1. General description The 74HC573; 74HCT573 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL specified in compliance with ...
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... Type number Package Temperature range 40 C to +125 C 74HC573N 74HCT534N 40 C to +125 C 74HC573D 74HCT573D 40 C to +125 C 74HC573DB 74HCT573DB 40 C to +125 C 74HC573PW 74HCT573PW 40 C to +125 C 74HC573BQ 74HCT573BQ 4. Functional diagram Fig 1. Functional diagram 74HC_HCT573 ...
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... NXP Semiconductors LATCH LATCH Fig 2. Logic diagram Fig 3. Logic symbol 74HC_HCT573 Product data sheet LATCH LATCH ...
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... NXP Semiconductors 5. Pinning information 5.1 Pinning 74HC573 74HCT573 GND Fig 5. Pin configuration DIP20, SO20, SSOP20 and TSSOP20 5.2 Pin description Table 2. Pin description Symbol Pin OE 1 D[0: GND Q[0:7] 19, 18, 17, 16, 15, 14, 13, 12 3-state latch output ...
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... NXP Semiconductors 6. Functional description [1] Table 3. Function table Operating mode Enable and read register (transparent mode) Latch and read register Latch register and disable outputs [ HIGH voltage level HIGH voltage level one set-up time prior to the HIGH-to-LOW LE transition LOW voltage level; ...
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... NXP Semiconductors 8. Recommended operating conditions Table 5. Recommended operating conditions Voltages are referenced to GND (ground = 0 V) Symbol Parameter V supply voltage CC V input voltage I V output voltage O T ambient temperature amb t/V input transition rise and fall rate 9. Static characteristics Table 6. Static characteristics At recommended operating conditions ...
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... NXP Semiconductors Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions I supply current 6 input I capacitance 74HCT573 V HIGH-level input voltage V LOW-level input voltage V HIGH-level output voltage = ...
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... NXP Semiconductors 10. Dynamic characteristics Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); C Symbol Parameter Conditions For type 74HC573 t propagation Dn to Qn; see pd delay propagation LE to Qn; see pd delay ...
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... NXP Semiconductors Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); C Symbol Parameter Conditions For type 74HCT573 t propagation Dn to Qn; see pd delay propagation LE to Qn; see pd delay enable time OE to Qn; see 4 disable time OE to Qn; see ...
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... NXP Semiconductors 11. Waveforms Measurement points are given in Fig 7. Propagation delay data input (Dn) to output (Qn) and output transition time Measurement points are given in Fig 8. Pulse width latch enable input (LE), propagation delay latch enable input (LE) to output (Qn) and output transition time 74HC_HCT573 Product data sheet ...
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... NXP Semiconductors OE input output LOW-to-OFF OFF-to-LOW output HIGH-to-OFF OFF-to-HIGH Measurement points are given in V and V are typical voltage output levels that occur with the output load Fig 9. Enable and disable times Measurement points are given in The shaded areas indicate when the input is permitted to change for predictable output performance. ...
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... NXP Semiconductors negative Test data is given in Table Definitions test circuit Termination resistance should be equal to output impedance Load capacitance including jig and probe capacitance Load resistance Test selection switch. Fig 11. Test circuit for measuring switching times Table 9. Test data ...
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... NXP Semiconductors 12. Package outline DIP20: plastic dual in-line package; 20 leads (300 mil pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions UNIT max. min. max. mm 4.2 0.51 3.2 inches 0.17 0.02 0.13 Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. ...
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... NXP Semiconductors SO20: plastic small outline package; 20 leads; body width 7 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.3 2.45 mm 2.65 0.25 0.1 2.25 0.012 0.096 inches 0.1 0.01 0.004 0.089 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...
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... NXP Semiconductors SSOP20: plastic shrink small outline package; 20 leads; body width 5 pin 1 index 1 e DIMENSIONS (mm are the original dimensions) A UNIT max. 0.21 1. 0.25 0.05 1.65 Note 1. Plastic or metal protrusions of 0.2 mm maximum per side are not included. OUTLINE VERSION IEC SOT339-1 Fig 14 ...
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... NXP Semiconductors TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...
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... NXP Semiconductors DHVQFN20: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 20 terminals; body 2.5 x 4.5 x 0.85 mm terminal 1 index area terminal 1 index area DIMENSIONS (mm are the original dimensions) (1) A UNIT max. 0.05 0. 0.2 0.00 0.18 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. ...
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... Product data sheet Alternative descriptive title corrected (errata). Product data sheet The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. Legal texts have been adapted to the new company name where appropriate. Product data sheet Product specification All information provided in this document is subject to legal disclaimers. Rev. 5 — ...
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... Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...
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... Product data sheet NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ ...
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... NXP Semiconductors 17. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 6 Functional description . . . . . . . . . . . . . . . . . . . 5 7 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 8 11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 13 13 Abbreviations ...