74HCT573D-T NXP Semiconductors, 74HCT573D-T Datasheet - Page 5

• Manufacturer Part Number: 74HCT573D-T
• Description: Latches OCTAL D-TYPE TRANS LATCH 3-S
• Manufacturer: NXP Semiconductors

Specifications of 74HCT573D-T

• Product Category: Latches
• Rohs: yes
• Number Of Circuits: 8
• Logic Type: TTL
• Logic Family: HCT
• Polarity: Non-Inverting
• Number Of Output Lines: 8
• High Level Output Current: - 6 mA
• Propagation Delay Time: 17 ns
• Supply Voltage - Max: 5.5 V
• Supply Voltage - Min: 4.5 V
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Package / Case: SO-20
• Mounting Style: SMD/SMT
• Number Of Input Lines: 8
• Factory Pack Quantity: 2000
• Part # Aliases: 74HCT573D,653

NXP Semiconductors
6. Functional description
Table 3.
[1]
7. Limiting values
Table 4.
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
[1]
[2]
74HC_HCT573
Product data sheet
Operating mode
Enable and read register (transparent
mode)
Latch and read register
Latch register and disable outputs
Symbol
V
I
I
I
I
I
T
P
IK
OK
O
CC
GND
stg
CC
tot
H = HIGH voltage level;
h = HIGH voltage level one set-up time prior to the HIGH-to-LOW LE transition;
L = LOW voltage level;
l = LOW voltage level one set-up time prior to the HIGH-to-LOW LE transition;
Z = high-impedance OFF-state.
For DIP20 package: P
For SO20: P
For SSOP20 and TSSOP20 packages: P
For DHVQFN20 package: P
Function table
Limiting values
Parameter
supply voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
tot
derates linearly with 8 mW/K above 70 C.
tot
derates linearly with 12 mW/K above 70 C.
[1]
tot
derates linearly with 4.5 mW/K above 60 C.
tot
All information provided in this document is subject to legal disclaimers.
Conditions
V
V
V
derates linearly with 5.5 mW/K above 60 C.
I
O
O
DIP20 package
SO20, SSOP20, TSSOP20 and
DHVQFN20 packages
< 0.5 V or V
Control
OE
L
L
H
< 0.5 V or V
= 0.5 V to (V
Rev. 5 — 15 August 2012
I
O
> V
CC
LE
H
L
L
> V
CC
+ 0.5 V)
CC
+ 0.5 V
+ 0.5 V
74HC573; 74HCT573
Input
Dn
L
H
l
h
l
h
Octal D-type transparent latch; 3-state
[1]
[2]
Internal
latches
L
H
L
H
L
H
Min
0.5
-
-
-
-
-
65
-
-
© NXP B.V. 2012. All rights reserved.
Max
+7
20
20
35
+70
70
+150
750
500
Output
Qn
L
H
L
H
Z
Z
Unit
V
mA
mA
mA
mA
mA
C
mW
mW
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