72V2113L7-5BC IDT, 72V2113L7-5BC Datasheet - Page 45

no-image

72V2113L7-5BC

Manufacturer Part Number
72V2113L7-5BC
Description
FIFO 256Kx18 /512Kx9 3.3V SUPERSYNC II FIFO
Manufacturer
IDT
Datasheet

Specifications of 72V2113L7-5BC

Data Bus Width
18 bit
Bus Direction
Unidirectional
Memory Size
4 Mbit
Timing Type
Synchronous
Organization
256 K x 18
Maximum Clock Frequency
133.3 MHz
Access Time
7 ns
Supply Voltage - Max
3.6 V
Supply Voltage - Min
8 V
Maximum Operating Current
35 mA
Maximum Operating Temperature
+ 70 C
Package / Case
BGA-100
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Part # Aliases
IDT72V2113L7-5BC
HIGH-IMPEDANCE
as well as three-state types) of an IC to a disabled (high-impedance) state and
selects the one-bit bypass register to be connected between TDI and TDO.
During this instruction, data can be shifted through the bypass register from TDI
to TDO without affecting the condition of the IC outputs.
IDT72V263/273/283/293/103/113 3.3V HIGH DENSITY SUPERSYNC II
8K x 18, 16K x 9/18, 32K x 9/18, 64K x 9/18, 128K x 9/18, 256K x 9/18, 512K x9
IDT72V2103/72V2113 3.3V HIGH DENSITY SUPERSYNC II
131,072 x 18/262,144 x 9, 262,144 x 18/524,288 x 9
The optional High-Impedance instruction sets all outputs (including two-state
TM
NARROW BUS FIFO
TM
45
NARROW BUS FIFO
BYPASS
functional mode and selects the one-bit bypass register to be connected
between TDI and TDO. The BYPASS instruction allows serial data to be
transferred through the IC from TDI to TDO without affecting the operation of
the IC.
The required BYPASS instruction allows the IC to remain in a normal
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
JUNE 1, 2010

Related parts for 72V2113L7-5BC