74AHC1G125GW-R NXP Semiconductors, 74AHC1G125GW-R Datasheet - Page 2
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74AHC1G125GW-R
Manufacturer Part Number
74AHC1G125GW-R
Description
Buffers & Line Drivers BUS BUF/LINE 3-STATE
Manufacturer
NXP Semiconductors
Datasheet
1.74AHC1G125GV.pdf
(17 pages)
Specifications of 74AHC1G125GW-R
Product Category
Buffers & Line Drivers
Rohs
yes
Number Of Input Lines
1
Number Of Output Lines
1
Polarity
Non-Inverting
Supply Voltage - Max
5.5 V
Supply Voltage - Min
2 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
SOT-353-5
High Level Output Current
- 8 mA
Logic Family
AHC
Logic Type
CMOS
Low Level Output Current
8 mA
Minimum Operating Temperature
- 40 C
Number Of Channels Per Chip
1
Output Type
3-State
Propagation Delay Time
11.5 ns at 3 V to 3.6 V
Factory Pack Quantity
10000
Part # Aliases
74AHC1G125GW,165
NXP Semiconductors
4. Marking
Table 2.
[1]
5. Functional diagram
6. Pinning information
74AHC_AHCT1G125
Product data sheet
Type number
74AHC1G125GW
74AHCT1G125GW
74AHC1G125GV
74AHCT1G125GV
74AHC1G125GM
74AHCT1G125GM
74AHC1G125GF
74AHCT1G125GF
Fig 1.
Fig 4.
The pin 1 indicator is located on the lower left corner of the device, below the marking code.
GND
OE
2
1
A
Logic symbol
Pin configuration
SOT353-1 and SOT753
Marking codes
1
2
3
OE
A
74AHCT1G125
74AHC1G125
6.1 Pinning
001aaf101
mna118
Y
5
4
4
V
Y
CC
All information provided in this document is subject to legal disclaimers.
Fig 2.
Fig 5.
Rev. 10 — 23 August 2012
GND
2
1
OE
IEC logic symbol
Pin configuration SOT886
A
Transparent top view
74AHC1G125; 74AHCT1G125
74AHCT1G125
74AHC1G125
EN
1
2
3
Marking
AM
CM
A25
C25
AM
CM
AM
CM
mna119
001aaj971
6
5
4
V
n.c.
Y
[1]
CC
4
Fig 3.
Fig 6.
OE
A
Bus buffer/line driver; 3-state
GND
OE
Pin configuration SOT891
Logic diagram
A
Transparent top view
74AHCT1G125
74AHC1G125
1
2
3
© NXP B.V. 2012. All rights reserved.
001aaj972
6
5
4
V
n.c.
Y
CC
mna120
2 of 17
Y