DS2154LA2 Maxim Integrated, DS2154LA2 Datasheet - Page 43
DS2154LA2
Manufacturer Part Number
DS2154LA2
Description
Network Controller & Processor ICs
Manufacturer
Maxim Integrated
Datasheet
1.DS2154LA2.pdf
(87 pages)
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CCR5: COMMON CONTROL REGISTER 5 (Address = AA Hex)
(Repeated here from Section
(MSB)
LIRST
SYMBOL
LIRST
RCM4
RCM3
RCM2
RCM1
RCM0
—
—
POSITION
CCR5.6,
CCR5.7
CCR5.5
CCR5.4
CCR5.3
CCR5.2
CCR5.1
CCR5.0
4
for convenience.)
—
NAME AND DESCRIPTION
Line Interface Reset. See Section
Not Assigned. Should be set to 0 when written.
Receive Channel Monitor Bit 4. MSB of a channel decode that
determines which receive channel data will appear in the
RDS0M register.
Receive Channel Monitor Bit 3.
Receive Channel Monitor Bit 2.
Receive Channel Monitor Bit 1.
Receive Channel Monitor Bit 0. LSB of the channel decode
that determines which receive DS0 channel data will appear in
the RDS0M register.
RCM4
43 of 87
RCM3
RCM2
4
for details
RCM1
.
RCM0
(LSB)
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