DS2155LC2 Maxim Integrated, DS2155LC2 Datasheet - Page 149

• Manufacturer Part Number: DS2155LC2
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 0–5 Gain Control Bits 0–5 (GC0–GC5). The GC0 through GC5 bits control the gain setting for the
nonautomatic gain mode. Use the tables below for setting the recommended values. The LB (line build-out)
column refers to the value in the
L0–L2 bits in LIC1 (Line Interface Control 1) register.
Bit 6/Automatic Gain Control Enable (AGCE).
Bit 7/Unused, must be set to zero for proper operation.
T1, Impedance Match On
E1, Impedance Match On
T1, Impedance Match
E1, Impedance Match
NETWORK MODE
0 = use Transmit AGC, TLBC bits 0–5 are “don’t care”
1 = do not use Transmit AGC, TLBC bits 0–5 set nominal level
Off
Off
7
0
-
AGCE
TLBC
Transmit Line Build-Out Control
7Dh
6
0
LB
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
4
5
0
1
GC5
5
0
GC5 GC4 GC3 GC2 GC1 GC0
1
0
0
1
1
1
0
1
0
0
0
0
1
1
0
1
1
1
1
1
0
0
GC4
4
0
0
1
1
0
0
0
1
1
1
1
1
1
0
0
0
1
0
0
0
0
1
1
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GC3
0
1
1
0
0
0
0
1
1
0
0
1
0
0
1
1
0
0
1
1
1
1
3
0
1
0
0
0
1
1
0
1
1
1
1
0
0
0
1
1
0
0
0
0
0
0
GC2
2
0
1
1
1
0
1
1
1
1
1
0
0
1
1
0
0
1
0
0
1
0
1
1
GC1
1
0
0
1
0
0
1
1
1
1
0
1
1
0
0
0
0
1
1
1
0
0
0
0
GC0
0
0