74ACTQ574SJ_Q Fairchild Semiconductor, 74ACTQ574SJ_Q Datasheet - Page 2

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74ACTQ574SJ_Q

Manufacturer Part Number
74ACTQ574SJ_Q
Description
Flip Flops Oct D-Type Flip-Flop
Manufacturer
Fairchild Semiconductor
Datasheet

Specifications of 74ACTQ574SJ_Q

Number Of Circuits
8
Logic Family
74ACT
Logic Type
D-Type Flip-Flop
Polarity
Non-Inverting
Input Type
Single-Ended
Output Type
Single-Ended
Propagation Delay Time
9 ns
High Level Output Current
- 24 mA
Low Level Output Current
24 mA
Supply Voltage - Max
5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
SOP-20
Minimum Operating Temperature
- 40 C
Number Of Input Lines
8
Number Of Output Lines
3
Supply Voltage - Min
4.5 V
©1990 Fairchild Semiconductor Corporation
74ACQ574, 74ACTQ574 Rev. 1.3
Logic Symbols
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to
estimate propagation delays.
IEEE/IEC
Figure 1.
2
Functional Description
The ACQ/ACTQ574 consists of eight edge-triggered
flip-flops with individual D-type inputs and 3-STATE true
outputs. The buffered clock and buffered Output Enable
are common to all flip-flops. The eight flip-flops will store
the state of their individual D-type inputs that meet the
setup and hold time requirements on the LOW-to-HIGH
Clock (CP) transition. With the Output Enable (OE)
LOW, the contents of the eight flip-flops are available at
the outputs. When OE is HIGH, the outputs go to the
high impedance state. Operation of the OE input does
not affect the state of the flip-flops.
Function Table
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
NC = No Change
OE CP
H
H
H
H
L
L
L
L
= LOW-to-HIGH Transition
Inputs
H
H
H
H
D
H
H
H
H
L
L
L
L
Internal Outputs
NC
NC
NC
NC
Q
H
H
L
L
O
NC
NC
H
Z
Z
Z
Z
L
N
Hold
Hold
Load
Load
Data Available
Data Available
No Change in
Data
No Change in
Data
Function
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