74ACTQ574SJ_Q Fairchild Semiconductor, 74ACTQ574SJ_Q Datasheet - Page 8

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74ACTQ574SJ_Q

Manufacturer Part Number
74ACTQ574SJ_Q
Description
Flip Flops Oct D-Type Flip-Flop
Manufacturer
Fairchild Semiconductor
Datasheet

Specifications of 74ACTQ574SJ_Q

Number Of Circuits
8
Logic Family
74ACT
Logic Type
D-Type Flip-Flop
Polarity
Non-Inverting
Input Type
Single-Ended
Output Type
Single-Ended
Propagation Delay Time
9 ns
High Level Output Current
- 24 mA
Low Level Output Current
24 mA
Supply Voltage - Max
5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
SOP-20
Minimum Operating Temperature
- 40 C
Number Of Input Lines
8
Number Of Output Lines
3
Supply Voltage - Min
4.5 V
©1990 Fairchild Semiconductor Corporation
74ACQ574, 74ACTQ574 Rev. 1.3
FACT Noise Characteristics
The setup of a noise characteristics measurement is
critical to the accuracy and repeatability of the tests. The
following is a brief description of the setup used to
measure the noise characteristics of FACT.
Equipment:
Procedure:
1. Verify Test Fixture Loading: Standard Load 50pF,
2. Deskew the HFS generator so that no two channels
3. Terminate all inputs and outputs to ensure proper
4. Set the HFS generator to toggle all but one output at a
5. Set the HFS generator input levels at 0V LOW and 3V
Notes:
16. V
17. Input pulses have the following characteristics:
Hewlett Packard Model 8180A Word Generator
PC-163A Test Fixture
Figure 2. Quiet Output Noise Voltage Waveforms
Tektronics Model 7854 Oscilloscope
500Ω.
have greater than 150 ps skew between them. This
requires that the oscilloscope be deskewed first. It is
important to deskew the HFS generator channels
before testing. This will ensure that the outputs switch
simultaneously.
loading of the outputs and that the input levels are at
the correct voltage.
frequency of 1 MHz. Greater frequencies will increase
DUT heating and effect the results of the measure-
ment.
HIGH for ACT devices and 0V LOW and 5V HIGH for
AC devices. Verify levels with an oscilloscope.
reference.
f = 1MHz, t
OHV
and V
r
OLP
= 3ns, t
are measured with respect to ground
f
= 3ns, skew < 150ps.
8
V
V
OLP
ILD
Determine the quiet output pin that demonstrates the
greatest noise levels. The worst case pin will usually
be the furthest from the ground pin. Monitor the output
voltages using a 50Ω coaxial cable plugged into a
standard SMB type connector on the test fixture.
Do not use an active FET probe.
Measure V
the worst case for active and enable transition.
Measure V
the worst case active and enable transition.
Verify that the GND reference recorded on the
oscilloscope has not drifted to ensure the accuracy
and repeatability of the measurements.
Monitor one of the switching outputs using a 50Ω
coaxial cable plugged into a standard SMB type
connector on the test fixture. Do not use an active
FET probe.
First increase the input LOW voltage level, V
the output begins to oscillate or steps out a min of
2ns. Oscillation is defined as noise on the output LOW
level that exceeds V
that exceed V
which oscillation occurs is defined as V
Next decrease the input HIGH voltage level, V
the output begins to oscillate or steps out a min of 2ns.
Oscillation is defined as noise on the output LOW
level that exceeds V
that exceed V
which oscillation occurs is defined as V
Verify that the GND reference recorded on the
oscilloscope has not drifted to ensure the accuracy
and repeatability of the measurements.
Figure 3. Simultaneous Switching Test Circuit
and V
/V
OLV
IHD
and V
OLP
OHP
:
IH
IH
and V
and V
limits. The input HIGH voltage level at
limits. The input LOW voltage level at
OHP
IL
IL
/V
OLV
OHV
limits, or on output HIGH levels
limits, or on output HIGH levels
OHV
on the quiet output during
on the quiet output during
:
ILD
IHD
www.fairchildsemi.com
.
.
IL
, until
IH
, until

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