DS2153Q-A7 Maxim Integrated, DS2153Q-A7 Datasheet - Page 19

• Manufacturer Part Number: DS2153Q-A7
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

Specifications of DS2153Q-A7

• Product: Framer
• Number Of Transceivers: 1
• Supply Current (max): 65 mA
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: PLCC-44
• Minimum Operating Temperature: 0 C
• Operating Supply Voltage: 5 V
• Supply Voltage - Max: 5.25 V
• Supply Voltage - Min: 4.75 V
• Part # Aliases: 90-2153Q-A70

RIR: RECEIVE INFORMATION REGISTER (Address = 08 Hex)
(MSB)
TESF
SYMBOL
CRCRC
CASRC
FASRC
RESE
TESF
TESE
JALT
RESF
TESE
POSITION
RIR.7
RIR.6
RIR.5
RIR.4
RIR.3
RIR.2
RIR.1
RIR.0
JALT
NAME AND DESCRIPTION
Transmit Elastic Store Full. Set when the elastic store fills and
a frame is deleted.
Transmit Elastic Store Empty. Set when the elastic store
empties and a frame is repeated.
Jitter Attenuator Limit Trip. Set when the jitter attenuator
FIFO reaches to within 4 bits of its limit; useful for debugging
jitter attenuation operation.
Elastic Store Full. Set when the elastic store buffer fills and a
frame is deleted.
Elastic Store Empty. Set when the elastic store buffer empties
and a frame is repeated.
CRC Resync Criteria Met. Set when 915/1000 codewords are
received in error.
FAS Resync Criteria Met. Set when three consecutive FAS
words are received in error.
CAS Resync Criteria Met. Set when two consecutive CAS MF
alignment words are received in error.
RESF
19 of 60
RESE
CRCRC
FASRC
CASRC
(LSB)