24LC16BH-I/P Microchip Technology, 24LC16BH-I/P Datasheet - Page 8
![IC EEPROM 16KBIT 400KHZ 8DIP](/photos/7/21/72167/24lc16bh-i_p_sml.jpg)
24LC16BH-I/P
Manufacturer Part Number
24LC16BH-I/P
Description
IC EEPROM 16KBIT 400KHZ 8DIP
Manufacturer
Microchip Technology
Datasheets
1.24LC16BT-IST.pdf
(22 pages)
2.24LC16BHT-IOT.pdf
(28 pages)
3.24LC16BH-ESN.pdf
(26 pages)
Specifications of 24LC16BH-I/P
Memory Size
16K (2K x 8)
Package / Case
8-DIP (0.300", 7.62mm)
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Speed
400kHz
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Organization
8 Block x 256 x 8
Interface Type
I2C
Maximum Clock Frequency
0.4 MHz
Access Time
900 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.5 V
Maximum Operating Current
3 mA
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
3.3 V, 5 V
Memory Configuration
8 BLK(256 X 8)
Ic Interface Type
I2C
Clock Frequency
400kHz
Supply Voltage Range
2.5V To 5.5V
Memory Case Style
DIP
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
24LC16BH-I/P
Manufacturer:
Microchip Technology
Quantity:
1 980
24AA16/24LC16B
5.0
Since the device will not acknowledge during a write
cycle, this can be used to determine when the cycle is
complete (this feature can be used to maximize bus
throughput). Once the Stop condition for a Write
command has been issued from the master, the device
initiates the internally-timed write cycle and ACK polling
can then be initiated immediately. This involves the
master sending a Start condition followed by the control
byte for a Write command (R/W =
busy with the write cycle, no ACK will be returned. If the
cycle is complete, the device will return the ACK and
the master can then proceed with the next Read or
Write command. See Figure 5-1 for a flow diagram of
this operation.
FIGURE 5-1:
DS21703G-page 8
ACKNOWLEDGE POLLING
Initiate Write Cycle
Send Control Byte
Write Command
with R/W = 0
Condition to
Acknowledge
Send Stop
(ACK = 0)?
Send Start
Did Device
Operation
Send
Next
ACKNOWLEDGE POLLING
FLOW
Yes
0
). If the device is still
No
6.0
The WP pin allows the user to write-protect the entire
array (000-7FF) when the pin is tied to V
V
SS
the write protection is disabled.
WRITE PROTECTION
© 2007 Microchip Technology Inc.
CC
. If tied to