74AUP1G125GM-G NXP Semiconductors, 74AUP1G125GM-G Datasheet - Page 25

• Manufacturer Part Number: 74AUP1G125GM-G
• Description: Buffers & Line Drivers 1.8V SINGLE BUF/DRVR 3-ST
• Manufacturer: NXP Semiconductors

Specifications of 74AUP1G125GM-G

• Product Category: Buffers & Line Drivers
• Rohs: yes
• Number Of Input Lines: 1
• Number Of Output Lines: 1
• Polarity: Non-Inverting
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 0.8 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: SOT-886-6
• High Level Output Current: - 4 mA
• Logic Family: AUP
• Logic Type: CMOS
• Low Level Output Current: 4 mA
• Minimum Operating Temperature: - 40 C
• Number Of Channels Per Chip: 1
• Output Type: 3-State
• Propagation Delay Time: 19 ns at 1.1 V to 1.3 V
• Factory Pack Quantity: 5000
• Part # Aliases: 74AUP1G125GM,115

NXP Semiconductors
18. Contents
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2
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6.1
6.2
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15
16
16.1
16.2
16.3
16.4
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18
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
Pinning information . . . . . . . . . . . . . . . . . . . . . . 3
Functional description . . . . . . . . . . . . . . . . . . . 4
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4
Recommended operating conditions. . . . . . . . 4
Static characteristics. . . . . . . . . . . . . . . . . . . . . 5
Dynamic characteristics . . . . . . . . . . . . . . . . . . 8
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 16
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 22
Legal information. . . . . . . . . . . . . . . . . . . . . . . 23
Contact information. . . . . . . . . . . . . . . . . . . . . 24
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 23
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2012.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [e-mail]
Low-power buffer/line driver; 3-state
74AUP1G125
Document identifier: 74AUP1G125
Date of release: 15 August 2012
All rights reserved.