MAX24001TL+ Maxim Integrated, MAX24001TL+ Datasheet - Page 17

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MAX24001TL+

Manufacturer Part Number
MAX24001TL+
Description
Laser Drivers 2.5G Burst Mode Laser Xcvr
Manufacturer
Maxim Integrated
Type
Laser Driverr
Datasheet

Specifications of MAX24001TL+

Rohs
yes
Data Rate
2.5 Gbps
Operating Supply Voltage
3 V to 3.6 V
Supply Current
136 mA
Maximum Operating Temperature
+ 95 C
Package / Case
TQFN-40
Maximum Power Dissipation
2857.1 mW
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Part # Aliases
90-Y24001+XS1
Laser Biasing
[Control Register Address Range A4h: A2h to A9h]
The bias current is controlled by the tx_biasdac register in one of six operating modes:
Open loop, static
Open loop, LUT
Closed loop,
natural start
Closed loop,
LUT start
Closed loop,
fast start
Closed loop,
LUT fast start
Operational Overview
The tx_biasmode<2:0> register is a grouping of three individual controls registers:
Open-Loop Operation
Clear the apc_enable register for open-loop operation.
The laser bias current is controlled by the tx_biasdac register with a resolution of 92.5μA per LSB (nominal). This
register may be set by the host, or alternatively set the bias_lut_enable bit to cause the tx_biasdac register to be
automatically refreshed from the bias lookup table (LUT) every 10ms. The bias LUT is stored in external EEPROM
at TWI slave address A6h, register address range 00h to 7Fh. It is indexed using the upper 7 bits of
temperature_uncal.
If the biasramp_en register is set then the value in tx_biasdac ramps progressively from the old value to the new
by 1 LSB every cycle of the internal 64MHz clock. This prevents glitches from occurring in the DAC. If ramping is
disabled then updates to tx_biasdac are effective immediately.
Maxim Integrated
OPERATING MODE
tx_biasmode<0> : bias_lut_enable
tx_biasmode<1> : faststart_enable
tx_biasmode<2> : apc_enable
tx_biasdac only changes when it is written by the host
tx_biasdac is constantly refreshed from values read from a temperature indexed lookup table
(the bias LUT)
An automatic power control (APC) loop constantly adjusts tx_biasdac in order to maintain a
target laser output power level. tx_biasdac defaults to near-zero after power-up and then
converges naturally on the target level over a duration of time dictated by the loop bandwidth.
The APC loop controls tx_biasdac, and tx_biasdac is preloaded from the bias LUT at power-up.
The APC loop controls tx_biasdac, and a fast-start algorithm is invoked at power-up to rapidly
converge the loop on the target power level.
The APC loop controls tx_biasdac. tx_biasdac is preloaded from the bias LUT at power up, and
then a fast-start algorithm is invoked to rapidly converge the loop on the target power level.
DESCRIPTION
000
001
100
101
110
111
tx_biasmode
17
<2:0>

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