74LVC1G32GW-R NXP Semiconductors, 74LVC1G32GW-R Datasheet - Page 19

• Manufacturer Part Number: 74LVC1G32GW-R
• Description: Logic Gates SINGLE 2-INPUT OR GATE
• Manufacturer: NXP Semiconductors

Specifications of 74LVC1G32GW-R

• Product Category: Logic Gates
• Rohs: yes
• Product: OR
• Logic Family: LVC
• Number Of Gates: 1
• Number Of Lines (input / Output): 2 / 1
• High Level Output Current: - 32 mA
• Low Level Output Current: 32 mA
• Propagation Delay Time: 2.1 ns
• Supply Voltage - Max: 5.5 V
• Supply Voltage - Min: 1.65 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: SOT-353
• Minimum Operating Temperature: - 40 C
• Number Of Input Lines: 2
• Number Of Output Lines: 1
• Factory Pack Quantity: 10000
• Part # Aliases: 74LVC1G32GW,165

NXP Semiconductors
18. Contents
1
2
3
4
5
6
6.1
6.2
7
8
9
10
11
12
13
14
15
16
16.1
16.2
16.3
16.4
17
18
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
Pinning information . . . . . . . . . . . . . . . . . . . . . . 3
Functional description . . . . . . . . . . . . . . . . . . . 4
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4
Recommended operating conditions. . . . . . . . 5
Static characteristics. . . . . . . . . . . . . . . . . . . . . 5
Dynamic characteristics . . . . . . . . . . . . . . . . . . 6
AC waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 16
Legal information. . . . . . . . . . . . . . . . . . . . . . . 17
Contact information. . . . . . . . . . . . . . . . . . . . . 18
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 17
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2012.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [e-mail]
74LVC1G32
Single 2-input OR gate
Date of release: 4 September 2012
Document identifier: 74LVC1G32
All rights reserved.