74LVC1G32GW-R NXP Semiconductors, 74LVC1G32GW-R Datasheet - Page 2

• Manufacturer Part Number: 74LVC1G32GW-R
• Description: Logic Gates SINGLE 2-INPUT OR GATE
• Manufacturer: NXP Semiconductors

Specifications of 74LVC1G32GW-R

• Product Category: Logic Gates
• Rohs: yes
• Product: OR
• Logic Family: LVC
• Number Of Gates: 1
• Number Of Lines (input / Output): 2 / 1
• High Level Output Current: - 32 mA
• Low Level Output Current: 32 mA
• Propagation Delay Time: 2.1 ns
• Supply Voltage - Max: 5.5 V
• Supply Voltage - Min: 1.65 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: SOT-353
• Minimum Operating Temperature: - 40 C
• Number Of Input Lines: 2
• Number Of Output Lines: 1
• Factory Pack Quantity: 10000
• Part # Aliases: 74LVC1G32GW,165

NXP Semiconductors
3. Ordering information
Table 1.
4. Marking
Table 2.
[1]
5. Functional diagram
74LVC1G32
Product data sheet
Type number
74LVC1G32GW
74LVC1G32GV
74LVC1G32GM
74LVC1G32GF
74LVC1G32GN
Type number
74LVC1G32GW
74LVC1G32GV
74LVC1G32GM
74LVC1G32GF
74LVC1G32GN
74LVC1G32GS
74LVC1G32GX
74LVC1G32GS
74LVC1G32GX
Fig 1.
The pin 1 indicator is located on the lower left corner of the device, below the marking code.
1
2
Logic symbol
Ordering information
Marking
B
A
Package
Temperature
range
40 C to +125 C
40 C to +125 C
40 C to +125 C
40 C to +125 C
40 C to +125 C
40 C to +125 C
40 C to +125 C
mna164
Y
4
SC-74A
XSON6
Name
TSSOP5
XSON6
XSON6
XSON6
X2SON5
All information provided in this document is subject to legal disclaimers.
Fig 2.
Rev. 10 — 4 September 2012
Marking code
VG
V32
VG
VG
VG
VG
VG
1
2
IEC logic symbol
Description
plastic thin shrink small outline package; 5 leads;
body width 1.25 mm
plastic surface-mounted package; 5 leads
plastic extremely thin small outline package;
no leads; 6 terminals; body 1  1.45  0.5 mm
plastic extremely thin small outline package;
no leads; 6 terminals; body 1  1  0.5 mm
extremely thin small outline package; no leads;
6 terminals; body 0.9  1.0  0.35 mm
extremely thin small outline package; no leads;
6 terminals; body 1.0  1.0  0.35 mm
X2SON5: plastic thermal enhanced extremely thin
small outline package; no leads; 5 terminals;
body 0.8  0.8  0.35 mm
≥1
mna165
[1]
4
Fig 3.
B
A
Logic diagram
74LVC1G32
Single 2-input OR gate
© NXP B.V. 2012. All rights reserved.
Version
SOT353-1
SOT753
SOT886
SOT891
SOT1115
SOT1202
SOT1226
mna166
2 of 19
Y