PCA9952TW,118 NXP Semiconductors, PCA9952TW,118 Datasheet
PCA9952TW,118
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PCA9952TW,118 Summary of contents
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PCA9952; PCA9955 16-channel Fm+ I Rev. 6 — 22 April 2013 1. General description The PCA9952 and PCA9955 are I driver optimized for dimming and blinking 57 mA Red/Green/Blue/Amber (RGBA) LEDs in amusement products. Each LEDn output has its own ...
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... NXP Semiconductors The Software Reset (SWRST) function allows the master to perform a reset of the PCA9952/55 through the I the registers to their default state causing the output current switches to be OFF (LED off). This allows an easy and quick way to reconfigure all device registers to the same condition ...
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... Topside mark PCA9952TW PCA9952 PCA9955TW PCA9955 4.1 Ordering options Table 2. Ordering options Type number Orderable part number PCA9952TW PCA9952TW,118 PCA9955TW PCA9955TW,118 PCA9952_PCA9955 Product data sheet 16-channel Fm Package Name Description HTSSOP28 plastic thermal enhanced thin shrink small outline package; 28 leads; body width 4.4 mm; lead pitch 0.65 mm; ...
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... NXP Semiconductors 5. Block diagram PCA9952/55 SCL INPUT FILTER SDA POWER- RESET 200 kΩ INPUT RESET FILTER REGISTER X BRIGHTNESS ÷ 256 31.25 kHz 8 MHz OSCILLATOR Dim repetition rate = 122 Hz. Blink repetition rate = every 16.8 seconds. (1) On PCA9955 this pin is address pin A3. On PCA9952 this pin is OE. ...
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... NXP Semiconductors 6. Pinning information 6.1 Pinning a. PCA9952 (1) Thermal pad; connected to V Fig 2. PCA9952_PCA9955 Product data sheet 16-channel Fm+ I PCA9952TW 002aae911 . SS Pin configuration for HTSSOP28 All information provided in this document is subject to legal disclaimers. Rev. 6 — 22 April 2013 PCA9952; PCA9955 2 C-bus 57 mA constant current LED driver ...
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... NXP Semiconductors 6.2 Pin description Table 3. Symbol REXT LED0 LED1 LED2 LED3 LED4 LED5 LED6 LED7 LED8 LED9 LED10 LED11 LED12 LED13 LED14 LED15 RESET SCL SDA [1] In order to obtain the best system level ESD performance, a standard pull-up resistor (10 k typical) is required for any address pin connecting to V performance, please refer to application notes AN10897 and AN11131 ...
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... NXP Semiconductors Table 4. Symbol REXT LED0 LED1 LED2 LED3 LED4 LED5 LED6 LED7 LED8 LED9 LED10 LED11 LED12 LED13 LED14 LED15 RESET SCL SDA [1] In order to obtain the best system level ESD performance, a standard pull-up resistor (10 k typical) is required for any address pin connecting to V performance, please refer to application notes AN10897 and AN11131 ...
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... NXP Semiconductors 7. Functional description Refer to 7.1 Device addresses Following a START condition, the bus master must output the address of the slave it is accessing. For PCA9955 there are a maximum of 16 possible programmable addresses using the 4 hardware address pins. For PCA9952 there are a maximum of 8 possible programmable addresses using the 3 hardware address pins ...
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... NXP Semiconductors Remark: The default LED All Call regular I PCA9952/55s on the I 7.1.3 LED bit Sub Call I • 3 different I • Default power-up values: – SUBADR1 register: ECh or 1110 110X – SUBADR2 register: ECh or 1110 110X – SUBADR3 register: ECh or 1110 110X • ...
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... NXP Semiconductors Table 5. AIF AI1 [1] AI1 and AI0 come from MODE1 register. Remark: Other combinations not shown in are reserved and must not be used for proper device operation. AIF + AI[1:0] = 000b is used when the same register must be accessed several times during a single I LED ...
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... NXP Semiconductors If MODE1 register bit AI1 = 0 and AI0 = 1 and if the Control register = 1000 0101, then the register addressing sequence will be (in hexadecimal): 05 06 … 19 0A 0B … 19 0A 0B … as long as the master keeps sending or reading data. ...
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... NXP Semiconductors [1] Table 6. Register summary Register number (hex) 27h 28h 29h 2Ah 2Bh 2Ch 2Dh 2Eh 2Fh 30h 31h ...
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... NXP Semiconductors 7.3.1 MODE1 — Mode register 1 Table 7. MODE1 - Mode register 1 (address 00h) bit description Legend: * default value. Bit Symbol Access 7 AIF read only 6 AI1 R/W 5 AI0 R/W 4 SLEEP R/W 3 SUB1 R/W 2 SUB2 R/W 1 SUB3 R/W 0 ALLCALL R/W It takes 500 s max. for the oscillator and running once SLEEP bit has been set to logic 0. Timings on LEDn outputs are not [1] guaranteed if PWMx, GRPPWM or GRPFREQ registers are accessed within the 500 ...
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... NXP Semiconductors 7.3.3 LEDOUT0 to LEDOUT3, LED driver output state Table 9. Legend: * default value. Address 02h 03h 04h 05h LDRx = 00 — LED driver x is off (default power-up state). LDRx = 01 — LED driver x is fully on (individual brightness and group dimming/blinking not controlled). LDRx = 10 — LED driver x individual brightness can be controlled through its PWMx register. LDRx = 11 — ...
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... NXP Semiconductors When DMBLNK bit is programmed with logic 1, GRPPWM and GRPFREQ registers define a global blinking pattern, where GRPFREQ contains the blinking period (from 16.8 s) and GRPPWM the duty cycle (ON/OFF ratio in %). duty cycle 7.3.5 GRPFREQ, group frequency Table 11. Legend: * default value. ...
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... NXP Semiconductors A 31.25 kHz fixed frequency signal is used for each output. Duty cycle is controlled through 256 linear steps from 00h (0 % duty cycle = LEDn output off) to FFh (99.6 % duty cycle = LEDn output at maximum brightness). Applicable to LEDn outputs programmed with LDRx = (LEDOUT0 to LEDOUT3 registers). ...
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... NXP Semiconductors The order in which the LEDn outputs are enabled will always be the same (channel 0 will enable first and channel 15 will enable last). OFFSET control register bits [3:0] determine the delay used between the turn-on times as follows: 0000 = no delay between outputs (all on, all off at the same time) ...
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... NXP Semiconductors Default power-up values are ECh, ECh, ECh. At power-up, SUBADR1 is enabled while SUBADR2 and SUBADR3 are disabled. The power-up default bit subaddress of ECh indicates that this device is a 16-channel LED driver. All three subaddresses are programmable. Once subaddresses have been programmed to their right values, SUBx bits need to be set to logic 1 in order to have the device acknowledging these addresses (MODE1 register) (0) ...
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... NXP Semiconductors 7.3.14 IREFALL register: output current value for all LEDn outputs The output current setting for all outputs is held in this register. When this register is written to or updated, all LEDn outputs will be set to a current corresponding to this register value. Write to IREF0 to IREF15 will overwrite the output current settings. ...
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... NXP Semiconductors Fig 6. (1) Assuming R Fig 7. PCA9952_PCA9955 Product data sheet 16-channel Fm+ I (mA) = IREFx (0 O(LEDn) ext (mA) = 255 (0 maximum I O(LEDn) Remark: Default IREFx at power- Maximum I versus R LED ext = 1 k. ext I versus IREFx value O(target) All information provided in this document is subject to legal disclaimers. ...
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... NXP Semiconductors 7.3.16 LED error detection The PCA9952/55 is capable of detecting an LED open or a short condition at its LEDn output. To detect LED error status, user must initiate the LEDn output fault test. The LEDout channel under test must conduct this test. Setting MODE2[ initiates the FAULTTEST. The entire test sequence takes ...
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... NXP Semiconductors [1] I th(det) R ext 7.3.16.2 Short-circuit detection principle The LED short-circuit detection compares the effective voltage level (V shorted-load detection threshold voltages V PCA9952/55 detects a shorted-load condition detected or error bit is reset. This error status can be read out as an error flag through the registers EFLAG0 and EFLAG1. For short-circuit error detection, a channel must be on ...
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... NXP Semiconductors Remark: Do not use external blinking control signal when internal global blinking is selected (DMBLNK = 1, MODE2 register) since it will result in an undefined blinking pattern. Do not use external dimming control signal when internal global dimming is selected (DMBLNK = 0, MODE2 register) since it will result in an undefined dimming pattern ...
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... NXP Semiconductors Fig 8. 2 The I C-bus master must interpret a non-acknowledge from the PCA9952/55 (at any time ‘SWRST Call Abort’. The PCA9952/55 does not initiate a reset of its registers. This happens only when the format of the SWRST Call sequence is not correct. 7.8 Individual brightness control with group dimming/blinking A 31 ...
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... NXP Semiconductors 8. Characteristics of the I 2 The I C-bus is for 2-way, 2-line communication between different ICs or modules. The two lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be connected to a positive supply via a pull-up resistor when connected to the output stages of a device ...
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... NXP Semiconductors SDA SCL MASTER TRANSMITTER/ RECEIVER Fig 12. System configuration 8.3 Acknowledge The number of data bytes transferred between the START and the STOP conditions from transmitter to receiver is not limited. Each byte of eight bits is followed by one acknowledge bit. The acknowledge bit is a HIGH level put on the bus by the transmitter, whereas the master generates an extra acknowledge related clock pulse ...
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... NXP Semiconductors 9. Bus transactions (1) Slave address shown for PCA9955. (2) See Table 6 for register definition. Fig 14. Write to a specific register (1) slave address START condition R/W acknowledge from slave ALLCALLADR register data (cont.) A acknowledge from slave STOP condition (1) Slave address shown for PCA9955. ...
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START condition R/W register selection acknowledge from slave Auto-Increment on PWM14 register data PWM15 register data (cont.) A acknowledge from slave This ...
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... NXP Semiconductors (1) slave address START condition R/W acknowledge from slave data from MODE2 register data from LEDOUT0 (cont.) A acknowledge from master data from last read byte (cont not acknowledge STOP from master condition This example assumes that the MODE1[ and MODE1[ ...
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... NXP Semiconductors (1) Slave address shown for PCA9955. (2) In this example, several PCA9955s are used and the same sequence (A) (above) is sent to each of them. (3) ALLCALL bit in MODE1 register is previously set to 1 for this example. (4) OCH bit in MODE2 register is previously set to 1 for this example. ...
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... NXP Semiconductors 10. Application design-in information (1) A standard 10 k pull-up resistor is required to obtain the best system level ESD performance. Fig 20. Typical application (PCA9955) 10.1 Thermal considerations Since the PCA9952/55 device integrates 16 linear current sources, thermal considerations should be taken into account to prevent overheating, which can cause the device to go into thermal shutdown. Perhaps the major contributor for device’ ...
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... NXP Semiconductors string. Reducing this to a minimum (e.g., 0.8 V) helps to keep the power dissipation down. Therefore LEDs binning is recommended to minimize LED voltage forward variation and reduce power dissipation in the device. In order to ensure that the device will not go into thermal shutdown when operating under certain application conditions, its junction temperature (T that is below the overtemperature threshold limit (125 ...
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... NXP Semiconductors T calculation C + (31 C/W 2.224 W) = 118.94 This confirms that the junction temperature is below the minimum overtemperature threshold of 125 C, which ensures the device will not go into thermal shutdown under these conditions important to mention that the value of the thermal resistance junction-to-ambient (R ) strongly depends in the PCB design ...
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... NXP Semiconductors 13. Static characteristics Table 24. Static characteristics 5 amb Symbol Parameter Supply V supply voltage DD I supply current DD I supply current DD I standby current stb V power-on reset voltage POR V power-down reset voltage PDR Input SCL; input/output SDA V LOW-level input voltage ...
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... NXP Semiconductors Table 24. Static characteristics 5 amb Symbol Parameter Address inputs, OE input (PCA9952 only), RESET input V LOW-level input voltage IL V HIGH-level input voltage IH I input leakage current LI C input capacitance i Overtemperature protection T overtemperature protection th(otp) threshold temperature ...
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... NXP Semiconductors [ time for Acknowledgement signal from SCL LOW to SDA (out) LOW. VD;ACK [ minimum time for SDA data out to be valid following SCL LOW. VD;DAT [3] A master device must internally provide a hold time of at least 300 ns for the SDA signal (refer to the V bridge the undefined region of SCL’ ...
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... NXP Semiconductors Fig 23. Output propagation delay 15. Test information Fig 24. Test circuitry for switching times PCA9952_PCA9955 Product data sheet 16-channel Fm+ I for SDA = 165 ( less current Load resistor for LEDn Load capacitance includes jig and probe capacitance Termination resistance should be equal to the output impedance Z T All information provided in this document is subject to legal disclaimers ...
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... NXP Semiconductors 16. Package outline HTSSOP28: plastic thermal enhanced thin shrink small outline package; 28 leads; body width 4.4 mm; lead pitch 0.65 mm; exposed die pad y exposed die pad side pin 1 index 1 e Dimensions Unit max 1.1 0.15 0.95 mm nom 0.10 0.90 0.25 min 0.05 0.85 Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. ...
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... NXP Semiconductors 17. Handling information All input and output pins are protected against ElectroStatic Discharge (ESD) under normal handling. When handling ensure that the appropriate precautions are taken as described in JESD625-A or equivalent standards. 18. Soldering of SMD packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “ ...
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... NXP Semiconductors • Process issues, such as application of adhesive and flux, clinching of leads, board transport, the solder wave parameters, and the time during which components are exposed to the wave • Solder bath specifications, including temperature and impurities 18.4 Reflow soldering Key characteristics in reflow soldering are: • ...
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... NXP Semiconductors Fig 26. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description”. PCA9952_PCA9955 Product data sheet 16-channel Fm+ I maximum peak temperature = MSL limit, damage level temperature minimum peak temperature ...
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... NXP Semiconductors 19. Soldering: PCB footprints )RRWSULQW LQIRUPDWLRQ IRU UHIORZ VROGHULQJ RI +76623 SDFNDJH Fig 27. PCB footprint for SOT1172-2 (HTSSOP28); reflow soldering PCA9952_PCA9955 Product data sheet 2 16-channel Fm+ I C-bus 57 mA constant current LED driver All information provided in this document is subject to legal disclaimers. Rev. 6 — 22 April 2013 PCA9952 ...
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... NXP Semiconductors 20. Abbreviations Table 28. Acronym ACK CDM DAC DUT EMI ESD HBM 2 I C-bus LED LSB MSB PCB PWM RGB RGBA SMBus PCA9952_PCA9955 Product data sheet 16-channel Fm+ I Abbreviations Description Acknowledge Charged-Device Model Digital-to-Analog Converter Device Under Test ElectroMagnetic Interference ...
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... NXP Semiconductors 21. References [1] AN10897, “A guide to designing for ESD and EMC” — NXP Semiconductors [2] AN11131, “How to improve system level ESD performance” — NXP Semiconductors 22. Revision history Table 29. Revision history Document ID Release date PCA9952_PCA9955 v.6 20130422 • Modifications: • PCA9952_PCA9955 v.5 20121001 PCA9952_PCA9955 v ...
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... Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...
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... PCA9952_PCA9955 Product data sheet 16-channel Fm+ I own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. ...
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... NXP Semiconductors 25. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 2 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 3 4.1 Ordering options . . . . . . . . . . . . . . . . . . . . . . . . 3 5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 4 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 5 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 6 7 Functional description . . . . . . . . . . . . . . . . . . . 8 7.1 Device addresses . . . . . . . . . . . . . . . . . . . . . . . 8 2 7.1.1 Regular I C-bus slave address 7.1.2 LED All Call I C-bus address . . . . . . . . . . . . . . ...