93LC86C-I/SN Microchip Technology, 93LC86C-I/SN Datasheet - Page 9

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93LC86C-I/SN

Manufacturer Part Number
93LC86C-I/SN
Description
IC EEPROM 16KBIT 3MHZ 8SOIC
Manufacturer
Microchip Technology
Datasheets

Specifications of 93LC86C-I/SN

Memory Size
16K (2K x 8 or 1K x 16)
Package / Case
8-SOIC (3.9mm Width)
Operating Temperature
-40°C ~ 85°C
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Speed
3MHz
Interface
Microwire, 3-Wire Serial
Voltage - Supply
2.5 V ~ 5.5 V
Organization
2 K x 8 or 1 K x 16
Interface Type
Microwire
Maximum Clock Frequency
3 MHz
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.5 V
Maximum Operating Current
3 mA
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
2.5 V, 5.5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
93LC86C-I/SN
Manufacturer:
MICROCHIP
Quantity:
12 000
Part Number:
93LC86C-I/SN
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
2.8
The WRITE instruction is followed by 8 bits (If ORG is
low or A-version devices) or 16 bits (If ORG pin is high
or B-version devices) of data which are written into the
specified address. The self-timed auto-erase and
programming cycle is initiated by the rising edge of CLK
on the last data bit.
FIGURE 2-6:
© 2008 Microchip Technology Inc.
CLK
CS
DO
DI
Write
93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C
1
High-Z
WRITE TIMING
0
1
A
N
•••
A0
Dx
•••
The DO pin indicates the Ready/
device, if CS is brought high after a minimum of 250 ns
low (T
is still in progress. DO at logical ‘1’ indicates that the
register at the specified address has been written with
the data specified and the device is ready for another
instruction.
D0
Note:
Note:
T
CSL
CSL
). DO at logical ‘0’ indicates that programming
T
WC
The write sequence requires a logic high
signal on the PE pin prior to the rising
edge of the last data bit.
After the Write cycle is complete, issuing a
Start bit and then taking CS low will clear
the Ready/
Busy
T
SV
Busy
Ready
status from DO
Busy
DS21797J-page 9
High-Z
status of the
T
CZ

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