ZSLS7025ZI1R ZMDI, ZSLS7025ZI1R Datasheet - Page 11
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ZSLS7025ZI1R
Manufacturer Part Number
ZSLS7025ZI1R
Description
LED Lighting Drivers LED Driver
Manufacturer
ZMDI
Datasheet
1.ZSLS7025ZI1R.pdf
(27 pages)
Specifications of ZSLS7025ZI1R
Rohs
yes
Input Voltage
5 V
Maximum Supply Current
400 uA
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
SOIC-8
Minimum Operating Temperature
- 40 C
When the input voltage on the FB pin does not exceed the internal feedback reference voltage V
during start-up, Q
switched on again.
2.3
The ZSLS7025 includes an internal 5V (typical) shunt regulator connected to the VDD pin which maintains a 5V
power supply for the gate driver and control circuitry. Connect V
resistor R
pin operating conditions (see section 1.2, parameter 1.2.3) and V
2.4
The current required by the ZSLS7025 is 0.25mA (typical) plus the switching current of the external MOSFET, Q
The switching frequency of Q
(found in the MOSFET manufacturer's data sheet).
Where
2.5
The ZSLS7025 regulates the LED current by sensing the voltage across the external feedback resistor R
series with the LEDs. The voltage is sensed via the FB pin where the internal feedback reference voltage V
0.3V (typical; see section 1.3, parameter 1.3.11). The LED current can easily be set according to equation (2).
Where
Note: For an accurate LED current, a precision resistor is required for R
2.6
There are three options for LED dimming:
Data Sheet
June 28, 2012
ZSLS7025
Boost LED Driver
f
Q
I
V
S
OUT
G
FB
= switching frequency of Q
Internal 5V Regulator
Input Current
LED Current Control
Dimming Control
= gate charge of Q
DC voltage dimming control
RC-filtered PWM signal dimming control
PWM signal with a dimming control MOSFET(Q
I
I
= Internal feedback reference voltage
= Average output current through the LED(s) in amperes
IN
OUT
VDD
. 0
(see section 4.2.1 for required values). Consideration should be given to the tolerances on the VDD
25
R
V
FB
FB
mA
1
© 2012 Zentrum Mikroelektronik Dresden AG — Rev.1.00
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without
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will remain off for the configured minimum t
0
R
3 .
Q
FB
G
V
1
f
S
1
affects the amount of current required, as does Q
1
2
)
OFF
IN
IN
.
time (see sections 2.8 and 2.9), and then it is
to the VDD pin via the current limiting series
FB
(1% is recommended).
1
's gate charge requirement
11 of 27
FB
(1)
(2)
, such as
FB
FB
in
is
1
.