SSL1523AP/N2,112 NXP Semiconductors, SSL1523AP/N2,112 Datasheet - Page 5

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SSL1523AP/N2,112

Manufacturer Part Number
SSL1523AP/N2,112
Description
LED Lighting Drivers SMPS 276V 1.9mA
Manufacturer
NXP Semiconductors
Datasheet

Specifications of SSL1523AP/N2,112

Rohs
yes
Input Voltage
80 V to 276 V
Operating Frequency
200 kHz
Maximum Supply Current
1.9 mA
Mounting Style
Through Hole
Package / Case
DIP-8
Factory Pack Quantity
50
NXP Semiconductors
SSL1523A
Product data sheet
8.3 Duty factor control
8.4 Valley switching
at low duty factors is easily realized. For high efficiency, the frequency is reduced as soon
as the duty factor drops below its low power threshold. This is accomplished by increasing
the oscillator charge time.
To ensure that the capacitor can be charged within the charge time, the value of the
oscillator capacitor should be limited to approximately 1 nF.
The duty factor is controlled by the internal regulation voltage and the oscillator signal on
pin RC. The internal regulation voltage is equal to the external regulation voltage (minus
2.5 V) multiplied by the gain of the error amplifier (typically 20 dB).
A new cycle is started when the primary switch is switched on (see
certain time (determined by the oscillator voltage RC and the internal regulation level), the
switch is turned off and the secondary stroke starts. The internal regulation level is
determined by the voltage on pin REG.
After the secondary stroke, the drain voltage shows an oscillation with a frequency
approximately equal to the value given by
where:
As soon as the oscillator voltage becomes high again and after the secondary stroke has
ended, the circuit waits for a low drain voltage before starting a new primary stroke.
Figure 3
secondary stroke and the RC voltage.
The primary stroke starts some time before the actual valley at low ringing frequencies,
and some time after the actual valley at high ringing frequencies.
--------------------------------------------- -
2
×
L
C
p
p
π
= primary self-inductance
= parasitic capacitance on drain node
×
1
(
shows the drain voltage together with the valley signal, the signal indicating the
L
p
×
C
All information provided in this document is subject to legal disclaimers.
p
)
Rev. 1 — 25 April 2012
Equation
1:
SMPS ICs for mains LED drivers
Figure
SSL1523A
© NXP B.V. 2012. All rights reserved.
3). After a
5 of 17
(1)

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