ISL1904FAZ-T Intersil, ISL1904FAZ-T Datasheet - Page 18

• Manufacturer Part Number: ISL1904FAZ-T
• Description: LED Lighting Drivers High Power LED Controllers, T&R
• Manufacturer: Intersil

Specifications of ISL1904FAZ-T

• Input Voltage: 9 VDC to 20 VDC
• Operating Frequency: 349 Hz
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: QSOP-16
• Minimum Operating Temperature: - 40 C

OVP
The ISL1904 has independent overvoltage protection accessed
through the OV pin. There is a nominal 20µA switched current
source used to create hysteresis. The current source is active only
during an OV fault; otherwise, it is inactive and does not affect
the node voltage. The magnitude of the hysteresis voltage is a
function of the external resistor divider impedance.
V
If the divider formed by R1 and R2 is sufficiently high
impedance, R3 is not required, and the hysteresis is:
ΔV
If that does not result in the desired hysteresis then R3 is
needed, and the hysteresis is:
ΔV
If the OV signal requires filtering, the filter capacitor, Copt, should
be placed as shown in Figure 11. The current hysteresis provides
great flexibility in setting the magnitude of the hysteresis voltage,
but it is susceptible to noise due to its high impedance. If the
hysteresis was implemented as a fixed voltage instead, the
ov ri
(
=
=
sin
20 10
20 10
MONITORED
g
VOLTAGE
⋅
⋅
)
R
=
PU
–
–
1.5
6
6
C
FIGURE 14. TYPE II EA CONFIGURATION
⋅
⋅
OPT
R1
⎛
⎝
⋅
R1
VERR
VREF
(
-------------------------- -
AC
R1
FIGURE 15. OV HYSTERESIS
C
+
FB1
R2
R3
+
REFERENCE
GENERATOR
R2
ISL1903
V
⋅
C
(
-------------------------- -
FB2
)
R1
+
_
R1
R2
18
R2
+
R3
R
R2
FB2
V
IOUT
FB
)
⎞
⎠
VREF
1
1.5V
R
FB1
V
R1
R2
0
20µA
+
_
C
FILTER
(EQ. 16)
(EQ. 18)
(EQ. 17)
ISL1904
signal could be filtered with a small capacitor placed between
the OV pin and signal ground. This technique does not work well
when the hysteresis is a current source because a current source
takes time to charge the filter capacitor. There is no
instantaneous change in the threshold level rendering the
current hysteresis ineffective. To remedy the situation, the filter
capacitor must be separated from the OV pin by R3. The
capacitor and R3 must be physically close to the OV pin.
OFFREF Control
The ISL1904 provides the ability to disable the output based on
the level of the control loop reference, set by the AC conduction
angle on the AC pin. Setting OFFREF to a voltage between 0 and
0.6V determines the threshold voltage that disables the output.
REFIN off
OFFREF allows the designer to disable the output at a
pre-determined load current to prevent undesirable behavior
such as at light loading conditions when there may be
insufficient current to maintain the holding current in a
triac-based dimmer. Setting OFFREF to less than 100mV disables
this feature. OFFREF has a nominal hysteresis of 50mV.
REFIN on
Quasi-Resonant Switching
The ISL1904 uses critical conduction mode PWM control
algorithm. Near zero voltage switching (ZVS) or quasi-resonant
valley switching, as it is sometimes referred to, can be achieved
in the flyback topology by delaying the next switching cycle after
the transformer current decays to zero (critical conduction
mode). The delay allows the primary inductance and capacitance
to oscillate, causing the switching FET drain-source voltage to
ring down to a minimal. If the FET is turned on at this minimal,
the capacitive switching loss (1/2 CV
The delay duration is set with a resistor from DELADJ to ground.
Figure 8 on page 13 shows the graphical relationship between
the delay duration and the value of the DELADJ resistance. The
relationship is linear for resistance values greater than ~ 20 kΩ
(
(
FIGURE 16. QUASI-RESONANT NEAR-ZVS SWITCHING
)
)
=
=
Winding Current
FET D-S Voltage
OFFREF 0.050
OFFREF 0.100
–
–
V
V
2
) is greatly reduced.
September 20, 2012
FN8286.1
(EQ. 19)
(EQ. 20)