E981.18A39FB ELMOS Semiconductor, E981.18A39FB Datasheet - Page 18

• Manufacturer Part Number: E981.18A39FB
• Description: Motor / Motion / Ignition Controllers & Drivers 8ch squib driver
• Manufacturer: ELMOS Semiconductor
• Type: Airbag Squib Driverr

Specifications of E981.18A39FB

• Rohs: yes
• Product: Electromechanical Drivers
• Operating Supply Voltage: 5 V
• Supply Current: 4.3 mA
• Operating Temperature: - 40 C to + 95 C
• Mounting Style: SMD/SMT
• Package / Case: QFN-44
• Number Of Outputs: 8
• Power Dissipation: 3.2 W

8-Channel Airbag Squib Driver
PRELIMINARY INFORMATION - AUG 01, 2011
The output of the supply monitoring of V
one global PORB as sketched in Fig. 7.
To make the power up status of the IC visible for the external µP, the global PORB, the V
V
event occurs, this bit is set to high level and frozen. By this the µP is able to read out the information in a
later SPI timing, also when the under voltage event has disappeared again. The reset of this register
has to be done with a clear CMD (see chapter 5.4.5).
To ensure a safe read out of the trimming array, V
V
To limit the forward current, charging the external C
R
array read out will be started is given by the time constant T=R
If V
restarted again. The status of the FUSE-Read out is visible at the MISO output flag “FUSE-FAIL (Bit[3],
see chapter 5.4.5).
5.3.1
see chapter 5.1.1, 5.1.2, 5.1.4, 5.1.5, 5.1.6 and 5.2.1.
5.3.2
This document contains information on a pre-production product. ELMOS Semiconductor AG reserves the right to change specifications and information herein without notice.
ELMOS Semiconductor AG
1
2
1) tested by ATPG scan test during ELMOS production test.
2) The POR reset pulse duration is derived from a not trimmed oscillator frequency F
No.
A_EN
A,READ_TRM_EN
V
is in the range between 700Ω and 1850Ω. Consequently the duration after power up, when the fuse
A
the FUSE Array read out is started after the power on reset pulse disappears (see chapter 5.13 and
5.15 for more detailed information about oscillator and trimming read out).
drops during operation below the V
are gated and summarized in a SPI status outputs register PWR_UP_FAIL. If a power-up fail
Global POR pulse length
SPI reset pulse length
POR and voltage monitoring DC characteristics
POR Dynamic, characteristics
. To speed up this, there is a bypass built by a forward diode from V
Description
SPI-reset CMD T
Condition
A,READ_TRM_EN
5
, V
Table 14: Reset, AC
ANL
Page 18 of 63
Data Sheet
and V
A
threshold, the read out of the FUSE Array is
must reach the minimum required threshold
BUF
T
DIG
POR
RES_SPI
Symbol
(see chapter 1.2), a Resistor R
are gated with the external reset signal MRB to
1) 2.)
1)
V
C
BUF
Min
10
.
(1/F
Typ
250
OSC_nom
QM-No.: 25DS0072E.00
5
to the V
)*2
V
OSC_NC
is implemented.
Max
30
U1_EN
A
pin internally.
E981.18
, because
and the
Unit
µs
ns