E981.18A39FB ELMOS Semiconductor, E981.18A39FB Datasheet - Page 21

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E981.18A39FB

Manufacturer Part Number
E981.18A39FB
Description
Motor / Motion / Ignition Controllers & Drivers 8ch squib driver
Manufacturer
ELMOS Semiconductor
Type
Airbag Squib Driverr
Datasheet

Specifications of E981.18A39FB

Rohs
yes
Product
Electromechanical Drivers
Operating Supply Voltage
5 V
Supply Current
4.3 mA
Operating Temperature
- 40 C to + 95 C
Mounting Style
SMD/SMT
Package / Case
QFN-44
Number Of Outputs
8
Power Dissipation
3.2 W
8-Channel Airbag Squib Driver
PRELIMINARY INFORMATION - AUG 01, 2011
5.4.5
BIT[0;1]
CM = 0 =>LCM active (default)
CM = 1 =>HCM active
TM = 0 => no Test Mode Driver active
TM = 1 => Test Mode Driver active
Bit is set to 1, if either TEST_UP (SPI CMD 0xE3) or TEST_LOW (SPI CMD 0xEC) is selected.
Which Driver Test mode is active (TESTDRH/TESTDRL) can be read out at the AMX Pin with
according SPI CMD.
BIT[2]
PWR_UP_FAIL =0 =>Power up ok, all supplies in recommended operating range
PWR_UP_FAIL =1 =>Power up fails. If a Power-Up failure occurs the “1” Bit is frozen, to be visible for
the µP. Register can be reset with according clear-CMD by SPI. After 1
default H-level. If the power up has been finished successfully, the bit will change to L-level after the
clear-CMD is set.
BIT[3]
FUSE_FAIL = 0 => Read out of Trimming array finished and OK
FUSE_FAIL = 1 = Read out of Trimming array not finished or erroneous (Parity check fails). The Fuse
Read out will be repeated 16 times. if the last run ends erroneous the internal state machine stops with
a permanently failure flag.
BIT[4]
OV_TXL=0 => no over voltage at all TXL (OV_TXL)
OV_TXL=1 => an over voltage at one or more TXL (OV_TXL) has occurred. Bit is frozen after
occurring. Register can be reset with according clear-CMD by SPI
BIT[5]
SC_TXU=0 => no short circuit to GND at all TXU(SC_TXU)
SC_TXU=1 => short circuit to GND at one or more TXU(SC_TXU) has occurred. Bit is frozen after
occurring. Register can be reset with according clear-CMD by SPI
BIT[6]
FE=Frame error: wrong Master command received (frame Bit length differs from 8 or 16Bit).
BIT[7]
PAR=Output Frame Parity BIT (safety); odd-Parity chosen.
This document contains information on a pre-production product. ELMOS Semiconductor AG reserves the right to change specifications and information herein without notice.
ELMOS Semiconductor AG
Status 8 Bit
CMD
RESET
value
Definition of 8 bit status frame at MISO
Bit[7]
MSB
PAR
1
Bit[6]
FE
0
Table 18: SPI Terminal MISO, output frame
SC_TXU
Bit[5]
0
Page 21 of 63
Data Sheet
OV_TXL
Bit[4]
0
FUSE_FAIL
Bit[3]
1
st
PWR_UP_FAIL
power-up the bit remains at
Bit[2]
1
QM-No.: 25DS0072E.00
Bit[1]
TM
0
E981.18
Bit[0]
LSB
CM
0

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