MC35XS3500DHFKR2 Freescale Semiconductor, MC35XS3500DHFKR2 Datasheet - Page 38

• Manufacturer Part Number: MC35XS3500DHFKR2
• Description: Power Switch ICs - Power Distribution PENTA 35MOHM ESWITCH
• Manufacturer: Freescale Semiconductor

Specifications of MC35XS3500DHFKR2

• Rohs: yes
• Number Of Outputs: 5
• On Resistance (max): 35 mOhms
• Operating Supply Voltage: 7 V to 20 V
• Supply Current (max): 10 mA
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: PQFN-24
• Minimum Operating Temperature: - 40 C
• Output Current: 65 mA

Reverse Polarity Protection on V
output transistors are turned ON (R
overloads and no protections are available.
destroy the 35XS3500 in cases of reverse polarity.
ISO 7637), the VCC line is still operating, while the VBAT line
is negative. Without loads on OUT1:5 terminal, an external
clamp between V
exceeding maximum rating. The maximum external clamp
voltage shall be between the reverse battery condition and 
-20 V.
without load on OUT outputs.
Loss of Supply Lines
line. The detection of the supply line failure is provided inside
the device itself.
Loss of V
(V
(wake=1), the outputs [1-5] are switched off immediately. No
current path exists from V
(OUT6) can be controlled by the SPI if V
above to V
To delatch the fault, the under-voltage condition should be
removed and:
behavior depends on V
38
35XS3500
FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
BATPOR1
In case of a permanently reverse polarity operation, the
An external diode on VCC is necessary in order to not to
In case of negative transients on the V
Therefore, the device is protected against latch-up with or
The 35XS3500 is protected against the loss of any supply
During an under-voltage of V
• the bit D7 must be rewritten to a logic [1] in Normal
• if the device was in Fail mode, the fault will be delatched
In case of V
• all latched faults are reset if V
• all latched faults are maintained under V
mode. Application of the OCHI window depends on
toggling or not toggling the D7 bit. When the fault is
delatched, the 35XS3500 returns to the configuration it
was just before the failure.
periodically by the Autorestart feature.
conditions. In case V
outputs are OFF. OUT6 output state depends on the
previous SPI configuration. The SPI configuration,
reporting (if V
range for at least 35 sec), and daisy-chain features are
CCUV
<V
BAT
BAT
BAT
. The fault is reported to the UVF bit (OD13).
BAT
<V
<V
BAT
BATUV
BATPOR1
and GND is mandatory to avoid
was previously in the nominal voltage
CC
BAT
:
) and with an active device
BAT
to V
(Power OFF state), the
is disconnected, OUT[1:5]
BAT
CC
CC
SD
. The external MOSFET
) to prevent thermal
< V
BAT
CC
BAT
CCUV
remains and is
CC
line (per
,
in nominal
Loss of V
35XS3500 is switched automatically into Fail mode (no
deglich time). The external SMART MOSFET is OFF. All SPI
registers are reset and must be reprogrammed when V
goes above V
VBAT < V
LOSS OF V
not within specification: (V
register contents are reset with default values corresponding
to all SPI bits are set to logic [0] and all latched faults are also
reset.
Loss of Ground (GND)
loads (the outputs (1:5) are switched OFF), but is not
destroyed by the operating condition. Current limit resistors in
the digital input lines protect the digital supply against
excessive current (1.0 kohm typical). The state of the
external smart power switch controlled by FETOUT is not
guaranteed, and the state of the external smart MOS is
defined with an external termination resistor.
Fatal Mistreatment of Logic I / O Pins
by a signal plausibility check according to
than 10 ms typical, the 35XS3500 is switched into Fail mode.
In case of a (PWM) Clock failure, no PWM feature is
provided, and the bit D7 defines the outputs state. In case of
a SPI failure, the 35XS3500 is switched into Fail mode
(Figure
During loss a of V
If the external V
During a loss of ground, the 35XS3500 cannot operate the
The digital I / Os are protected against fatal mistreatment
In case the LIMP input is set to a logic [1] for a delay longer
SPI (MOSI, SCLK,
provided for RST is set to logic [1]. The SPI pull-up and
pull-down current resistors are available. This fault
condition can be diagnosed with UVF fault in OD13
reporting bit. The previous device configuration is
maintained. No current is conducted from V
18)
(PWM) CLOCK
Input / Output
BATPOR2
Table 17. Logic I / O Plausibility Check
CC
LIMP
CC
CCUV
(Digital Logic Supply Line)
AND V
BAT
.
. The device will transit in OFF mode if
CC
CS)
and V
Analog Integrated Circuit Device Data
(V
BAT
CC
CC
CC
< V
and V
supplies are disconnected (or
CCUV
WD, D10 bit internal toggle
Signal Check Strategy
Freescale Semiconductor
BAT
Debounce for 10 ms
) and with wake=1, the
Frequency range
(bandpass filter)
) < V
Table
BATPOR1
17.
CC
), all SPI
to V
CC
BAT
.