AT24C1024B-PU Atmel, AT24C1024B-PU Datasheet
AT24C1024B-PU
Specifications of AT24C1024B-PU
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AT24C1024B-PU Summary of contents
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... Die Sales: Wafer Form, Tape and Reel and Bumped Die Description The AT24C1024B provides 1,048,576 bits of serial electrically erasable and program- mable read only memory (EEPROM) organized as 131,072 words of 8 bits each. The device’s cascadable feature allows up to four devices to share a common two-wire bus ...
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... Absolute Maximum Ratings* Operating Temperature..................................–55°C to +125°C Storage Temperature .....................................–65°C to +150°C Voltage on Any Pin with Respect to Ground .................................... –1.0V to +7.0V Maximum Operating Voltage .......................................... 6.25V DC Output Current........................................................ 5.0 mA AT24C1024B 2 Pin Configurations Function Address Input Address Input Serial Data Serial Clock Input ...
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... DEVICE ADDRESS LOAD COMPARATOR R/W DATA WORD ADDR/COUNTER Y DEC OUT plane is <3 pF. If coupling is >3 pF, Atmel recommends connecting the CC plane is <3 pF. If coupling is >3 pF, Atmel recommends connecting CC prior to a write operation creates a software write-protect CC SERIAL EN H.V. PUMP/TIMING LOGIC DATA RECOVERY INC ...
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... Memory Organization AT24C1024B, 1024K SERIAL EEPROM: The 1024K is internally organized as 512 pages of 256 bytes each. Random word addressing requires a 17-bit data word address. (1) Table 3-1. Pin Capacitance Applicable over recommended operating range from T Symbol Test Condition C Input/Output Capacitance (SDA) I/O C Input Capacitance (A ...
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Table 3-3. AC Characteristics (Industrial Temperature) Applicable over recommended operating range from T erwise noted). Test conditions are listed in Note 2. Symbol Parameter t Noise Suppression Time i t Clock Low to Data Out Valid AA Time the bus ...
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... EEPROM in 8-bit words. The EEPROM sends a zero during the ninth clock cycle to acknowl- edge that it has received each word. STANDBY MODE: The AT24C1024B features a low-power standby mode which is enabled: a) upon power-up and b) after the receipt of the stop bit and the completion of any internal operations ...
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Figure 4-3. Write Cycle Timing (SCL: Serial Clock, SDA: Serial Data I/O) SCL SDA 8th BIT WORDn Note: 1. The write cycle time t is the time from a valid stop condition of a write sequence to the end of ...
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... A read operation is initiated if this bit is high and a write operation is initiated if this bit is low. Upon a compare of the device address, the EEPROM will output a zero compare is not made, the device will return to a standby state. AT24C1024B 8 START 1 ...
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... DATA SECURITY: The AT24C1024B has a hardware data protection scheme that allows the user to write-protect the entire memory when the WP pin Write Operations BYTE WRITE: To select a data word in the 1024K memory requires a 17-bit word address. The word address field consists of the P address followed by the least significant word address (see A write operation requires the P address word and acknowledgment ...
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... The sequential read operation is terminated when the microcontroller does not respond with a zero, but does generate a following stop condition (see AT24C1024B 10 Figure 7-5 on page 12). ...
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Figure 7-1. Device Address Figure 7-2. Byte Write Figure 7-3. Page Write P 0 Figure 7-4. Current Address Read 5194F–SEEPR–1/ MOST LEAST SIGNIFICANT SIGNIFICANT P 0 MOST LEAST SIGNIFICANT SIGNIFICANT 11 ...
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... Figure 7-5. Random Read P 0 Figure 7-6. Sequential Read High Byte ADDRESS P 0 AT24C1024B 12 High Byte Low Byte ADDRESS ADDRESS Low Byte ADDRESS Data Data Data 5194F–SEEPR–1/08 ...
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... Ordering Information Ordering Code AT24C1024B-PU (Bulk form only) AT24C1024B-PU25 (Bulk form only) (1) AT24C1024BN-SH-B (NiPdAu Lead Finish) (2) AT24C1024BN-SH-T (NiPdAu Lead Finish) (1) AT24C1024BN-SH25-B (NiPdAu Lead Finish) (2) AT24C1024BN-SH25-T (NiPdAu Lead Finish) (1) AT24C1024BW-SH-B (NiPdAu Lead Finish) (2) AT24C1024BW-SH-T (NiPdAu Lead Finish) (1) AT24C1024BW-SH25-B (NiPdAu Lead Finish) (2) AT24C1024BW-SH25-T ...
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... Lot Number |---|---|---|---|---|---|---|---| | Pin 1 Indicator (Dot) 8.2 8-SOIC(2.5V) TOP MARK |---|---|---|---|---|---|---|---| |---|---|---|---|---|---|---|---| |---|---|---|---|---|---|---|---| * Lot Number |---|---|---|---|---|---|---|---| | Pin 1 Indicator (Dot) AT24C1024B 14 Seal Year Y = SEAL YEAR | Seal Week 6: 2006 | | | 7: 2007 8: 2008 2009 Lot Number to Use ALL Characters in Marking BOTTOM MARK Seal Year Y = SEAL YEAR | Seal Week 6: 2006 | | | ...
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TOP MARK Pin 1 Indicator (Dot) | |---|---|---|---| * |---|---|---|---|---| |---|---|---|---|---| BOTTOM MARK |---|---|---|---|---|---|---| P H |---|---|---|---|---|---|---| |---|---|---|---|---|---|---| <- Pin 1 Indicator 8.4 8-TSSOP(2.5V) TOP MARK Pin ...
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... Pin 1 Indicator (Dot) 8.7 8-Ultra Thin SAP (1.8V) TOP MARK Seal Year |---|---|---|---|---|---|---|---| |---|---|---|---|---|---|---|---| |---|---|---|---|---|---|---|---| Lot Number |---|---|---|---|---|---|---|---| * | Pin 1 Indicator (Dot) AT24C1024B SEAL YEAR Seal Week 6: 2006 | | 7: 2007 8: 2008 2009 Lot Number to Use ALL Characters in Marking BOTTOM MARK Y = SEAL YEAR Seal Week 6: 2006 | | 7: 2007 8: 2008 ...
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... M = SEAL MONTH (USE ALPHA DESIGNATOR A- JANUARY B = FEBRUARY " " """"""" OCTOBER K = NOVEMBER L = DECEMBER TC = TRACE CODE (ATMEL LOT NUMBERS TO CORRESPOND WITH ATK TRACE CODE LOG BOOK) 5194F–SEEPR–1/08 Seal Year | Seal Week Y = SEAL YEAR ...
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... D, D1 and E1 dimensions do not include mold Flash or protrusions. Mold Flash or protrusions shall not exceed 0.010 inch and eA measured with the leads constrained to be perpendicular to datum. 5. Pointed or rounded lead tips are preferred to ease insertion and b3 maximum dimensions do not include Dambar protrusions. Dambar protrusions shall not exceed 0.010 (0.25 mm). 2325 Orchard Parkway San Jose, CA 95131 R AT24C1024B ...
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JEDEC SOIC TOP VIEW e e SIDE VIEW Note: These drawings are for general information only. Refer to JEDEC Drawing MS-012, Variation AA for proper dimensions, tolerances, datums, etc. 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 ...
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... It is recommended that upper and lower cavities be equal. If they are different, the larger dimension shall be regarded. 4. Determines the true geometric position. 5. Values b,C apply to plated terminal. The standard thickness of the plating layer shall measure between 0.007 to .021 mm. 2325 Orchard Parkway San Jose, CA 95131 R AT24C1024B TOP VIEW ...
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TSSOP Pin 1 indicator this corner N Top View Side View Notes: 1. This drawing is for general information only. Refer to JEDEC Drawing MO-153, Variation AA, for proper dimensions, tolerances, datums, ...
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... A1 BALL PAD CORNER e (e1) 5. Dimension 'b' is measured at the maximum solder ball diameter. This drawing is for general information only. 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 R AT24C1024B TOP VIEW A1 BALL PAD CORNER (d1) BOTTOM VIEW 8 SOLDER BALLS TITLE 8U4-1, 8-ball, 2.47 x 4.07 mm Body, 0.75 mm pitch, Small Die Ball Grid Array Package (dBGA2) 5 ...
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SAP PIN 1 INDEX AREA D E 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 R 5194F–SEEPR–1/08 A PIN COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN A – A1 0.00 ...
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... AT24C1024B 24 Date Comments Removed ‘NiPdAu’ from AT24C1024BU4-UU-T 1/2008 Removed ‘Preliminary’ status Updated Part Marking Scheme Updated to new Template 8/2007 Updated to common figures Added Package Marking tables 5/2007 Changed ‘Advance Information’ to ‘Preliminary’ ...
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... Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDI- TIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT ...