E909.05A61DC ELMOS Semiconductor, E909.05A61DC Datasheet - Page 28

• Manufacturer Part Number: E909.05A61DC
• Description: Processors - Application Specialized Halios multipurpose sensor IC
• Manufacturer: ELMOS Semiconductor

Specifications of E909.05A61DC

• Rohs: yes
• Processor Series: EL16
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 8 MHz
• Data Ram Size: 3 kB
• Operating Supply Voltage: 2.25 V to 2.75 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: QFN-32
• Interface Type: I2C, SPI
• Memory Type: Flash, SRAM
• Minimum Operating Temperature: - 40 C
• Number Of Timers: 2

PRELIMINARY INFORMATION AUG 02, 2011
Fig. 6.5-2: Instruction Set of EL16
This document contains information on a pre-production product. ELMOS Semiconductor AG reserves the right to change specifications and information herein without notice.
ELMOS Semiconductor AG
Mnemonic
ADC(.B)**
ADD(.B)
ADDC(.B)
AND(.B)
BIC(.B)
BIS(.B)
BIT(.B)
BR
CALL
CLR (.B)**
CLRC**
CLRN**
CLRZ**
CMP (.B)
DADC (.B)**
DADD (.B)
DEC (.B)**
DECD (.B)**
DINT**
EINT**
INC (.B)
INCD (.B)**
INV (.B)**
JC / JHS
JZ / JEQ
JGE
JL
JMP
JN
JNC /JLO
JNZ / JNE
MOV (.B)
NOP
POP (.B)**
PUSH (.B)
RET**
RETI
RLA (.B)**
RLC (.B)**
RRA (.B)
RRC (.B)
SBC (.B)**
SETC**
SETN**
SETZ**
SUB (.B)
SUBC (.B)**
SWPB
SXT
TST (.B)**
XOR(.B)
6.5.1 EL16 Instruction Cycle Counts
HALIOS® MULTI-PURPOSE OPTICAL SENSOR WITH HIGH LIGHT IMMUNITY
Parameters
dst
src, dst
src, dst
src, dst
src, dst
src, dst
src, dst
dst
dst
dst
---
---
---
src, dst
dst
src, dst
dst
dst
---
---
dst
dst
dst
label
label
label
label
label
label
label
label
src, dst
---
dst
src
---
---
dst
dst
dst
dst
dst
---
---
---
src, dst
src, dst
dst
dst
dst
src, dst
Description
Add C to destination
Add source to destination
Add source to C and destination
AND source and destination
Clear bits in destination
Set bits in destination
Test bits in destination
Branch to destination
Call destination
Clear destination 0
Clear C 0
Clear N 0
Clear Z 0
Compare source and destination
Add C decimally to destination
Add source and C decimally to destination
Decrement destination
Double decrement destination
Disable interrupts 0
Enable interrupts 1
Increment destination
Double increment destination
Invert destination
Jump if C set / Jump if higher or same
Jump if Z set / Jump if equal
Jump if greater or equal
Jump if less
Jump
Jump if N set / Jump if negative
Jump if C not set / Jump if lower
Jump if Z not set / Jump if equal
Move source to destination
No operation
Pop item from stack to destination
Push source onto stack
Return from subroutine
Return from interrupt
Rotate left arithmetically
Rotate left through C
Rotate right arithmetically
Rotate right through C
Subtract not(C) from destination
Set C
Set N
Set Z
subtract source from destination
subtract source and not(C) from destination
Swap bytes
Extend sign
Test destination
Exclusive OR source and destination
Data Sheet 28 / 67
dst + C -> dst
src + dst -> dst
src + dst + C -> dst
src AND dst -> dst
NOT(src) AND dst -> dst
src OR dst -> dst
src AND dst
dst -> PC
SP-2 -> SP, PC+2 -> @SP, dst -> PC
0 -> dst
0 -> C
0 -> N
0 -> Z
dst - src
dst + C -> dst
src + dst + C -> dst
dst -1 -> dst
dst -2 -> dst
0 -> GIE
1 -> GIE
dst +1 -> dst
dst +2 -> dst
NOT(dst) -> dst
if (condition) PC + 2 * offset -> PC
if (condition) PC + 2 * offset -> PC
if (condition) PC + 2 * offset -> PC
if (condition) PC + 2 * offset -> PC
PC + 2 * offset -> PC
if (condition) PC + 2 * offset -> PC
if (condition) PC + 2 * offset -> PC
if (condition) PC + 2 * offset -> PC
src -> dst
---
@SP+ -> dst
SP -2 -> SP, src -> SP
@SP -> PC
@SP -> SR, @SP+ -> PC
dst * 2 -> dst
dst * 2 -> dst, C -> LSB(dst)
dst / 2 -> dst
dst / 2 -> dst, C -> MSB(dst)
dst + NOT(0) + C -> dst
1 -> C
1 -> N
1 -> Z
dst + NOT(src) + 1 -> dst
dst + NOT(src) + C -> dst
---
---
dst + NOT (0) + 1
src XOR dst -> dst
QM-No.: 25DS0014E.00
E909.05
V
0
0
0
0
0
0
0
0
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