E909.06A61DC ELMOS Semiconductor, E909.06A61DC Datasheet - Page 45

• Manufacturer Part Number: E909.06A61DC
• Description: Processors - Application Specialized Halios multipurpose sensor IC - Auto
• Manufacturer: ELMOS Semiconductor

Specifications of E909.06A61DC

• Rohs: yes
• Processor Series: EL16
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 8 MHz
• Data Ram Size: 3 kB
• Operating Supply Voltage: 2.25 V to 2.75 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: QFN-32
• Interface Type: I2C, SPI
• Memory Type: Flash, SRAM
• Minimum Operating Temperature: - 40 C
• Number Of Timers: 2

5.11.5 Data FIFO Registers
Receive Data FIFO Registers:
The data received from the master is stored in the receive FIFO registers and has a depth of 4. The current fill
level can be read in the status register. If the FIFO is completely filled up and another byte should be received the
interface will force the master into a wait state until the application software reads one byte from the FIFO.
Send Data FIFO Registers:
The master reads data that is stored in the send FIFO registers. This FIFO buffer has a depth of 4 registers. The
current fill level can be read in the status register. If the FIFO is empty and a byte is requested by the master the
interface will force the master into a wait state until the application software writes one byte to the FIFO.
5.11.6 Interrupt Handling
I²C receive command (see List Of All Interrupts)
Command word pending in receive FIFO, this means the next byte read from the receive FIFO is the first received
byte after the slave has been addressed. Depending on the application software this byte could be interpreted as
a command. The interrupt flag is set back by reading a byte from the receive FIFO. The master will force the inter-
face into a wait state until the application software reads one byte from the FIFO.
I²C send request (see List Of All Interrupts)
This flag signalizes that the master is requesting a byte but the send FIFO is empty. The interrupt flag is set back
by writing a byte to the send FIFO. The master will force the interface into a wait state until the application soft-
ware writes one byte to the FIFO.
I²C send FIFO low water (see List Of All Interrupts)
In case the low water mark (defined in control register) is reached or is exceeded the send FIFO low water flag be-
comes active. The flag is set back by filling to the send FIFO.
I²C receive FIFO high water (see List Of All Interrupts)
If the high water mark (defined in control register) is reached or is exceeded the receive FIFO high water flag be-
comes active. The flag is set back by reading from the receive FIFO..
ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
HALIOS® MULTI PURPOSE SENSOR FOR AUTOMOTIVE
PRODUCTION DATA - NOV 16, 2011
ELMOS Semiconductor AG
Data Sheet
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QM-No.: 25DS0049E.02
E909.06