P5010NSE1VNB Freescale Semiconductor, P5010NSE1VNB Datasheet - Page 94

• Manufacturer Part Number: P5010NSE1VNB
• Description: Processors - Application Specialized Tmp Enc 2000/1333
• Manufacturer: Freescale Semiconductor

Specifications of P5010NSE1VNB

• Rohs: yes

Electrical Characteristics
Figure 26
For input signals, the Local Bus AC timing data is used directly for all three controllers.
For output signals, each type of controller provides its own unique method to control the signal timing. The final signal delay
value for output signals is the programmed delay plus the AC timing delay. For example, for GPCM, LCS can be programmed
to delay by t
94
(Except LGTA/LUPWAIT/LFRB)
(LGTA/LUPWAIT/LFRB)
applies to all three controllers that eLBC supports: GPCM, UPM, and FCM.
acs
(address phase)
(0, ¼, ½, 1, 1 + ¼, 1 + ½, 2, 3 cycles), so the final delay is t
Output Signals
(Except LALE)
(data phase)
Input Signals
Input Signal
LAD/LDP
LCLK[m]
P5020/P5010 QorIQ Integrated Processor Hardware Specifications, Rev. 0
LALE
LAD
Figure 25. Enhanced Local Bus Signals
t
LBKLOV
t
LBIVKH
acs
+ t
LBKLOV
t
LBIVKL
t
.
LBIXKH
t
LBONOT
t
LBKLOX
t
Freescale Semiconductor
LBKLOZ
t
LBIXKL