AT28C010-12TU Atmel, AT28C010-12TU Datasheet

IC EEPROM 1MBIT 120NS 32TSOP

AT28C010-12TU

Manufacturer Part Number
AT28C010-12TU
Description
IC EEPROM 1MBIT 120NS 32TSOP
Manufacturer
Atmel
Datasheets

Specifications of AT28C010-12TU

Format - Memory
EEPROMs - Parallel
Memory Type
EEPROM
Memory Size
1M (128K x 8)
Speed
120ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
32-TSOP
Density
1Mb
Interface Type
Parallel
Organization
128Kx8
Access Time (max)
120ns
Write Protection
Yes
Data Retention
10Year
Operating Supply Voltage (typ)
5V
Package Type
TSOP-I
Operating Temp Range
-40C to 85C
Supply Current
40mA
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
32
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT28C010-12TU
Manufacturer:
ATMEL
Quantity:
17
Part Number:
AT28C010-12TU
Manufacturer:
ATMEL
Quantity:
546
Features
Pin Configuration
Pin Name
A0 - A16
CE
OE
WE
I/O0 - I/O7
NC
Fast Read Access Time - 120 ns
Automatic Page Write Operation
Fast Write Cycle Time
Low Power Dissipation
Hardware and Software Data Protection
DATA Polling for End of Write Detection
High Reliability CMOS Technology
Single 5V ± 10% Supply
CMOS and TTL Compatible Inputs and Outputs
JEDEC Approved Byte-Wide Pinout
CERDIP, FLATPACK
GND
I/O0
I/O1
I/O2
A16
A15
A12
NC
– Internal Address and Data Latches for 128-Bytes
– Internal Control Timer
– Page Write Cycle Time - 10 ms Maximum
– 1 to 128-Byte Page Write Operation
– 80 mA Active Current
– 300 µA CMOS Standby Current
– Endurance: 10
– Data Retention: 10 Years
A7
A6
A5
A4
A3
A2
A1
A0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Top View
Function
Addresses
Chip Enable
Output Enable
Write Enable
Data Inputs/Outputs
No Connect
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
VCC
WE
NC
A14
A13
A8
A9
A11
OE
A10
CE
I/O7
I/O6
I/O5
I/O4
I/O3
4
or 10
5
A12
NC
NC
NC
Cycles
A7
A6
A5
A4
A3
A2
A1
7
8
9
10
11
12
13
14
15
16
17
Top View
44 LCC
39
38
37
36
35
34
33
32
31
30
29
A13
A8
A9
A11
NC
NC
NC
NC
OE
A10
CE
I/O0
A7
A6
A5
A4
A3
A2
A1
A0
5
6
7
8
9
10
11
12
13
Top View
Top View
32 LCC
PGA
(continued)
29
28
27
26
25
24
23
22
21
A14
A13
A8
A9
A11
OE
A10
CE
I/O7
AT28C010 Mil
1-Megabit
(128K x 8)
Paged Parallel
EEPROMs
AT28C010
Military
0010D–PEEPR–7/09

Related parts for AT28C010-12TU

AT28C010-12TU Summary of contents

Page 1

... A10 I/O5 I/ I/O4 GND 16 17 I/O3 32 LCC Top View I/ LCC Top View PGA Top View 39 A13 A11 A10 29 CE AT28C010 Mil 1-Megabit (128K x 8) Paged Parallel EEPROMs AT28C010 Military (continued) 29 A14 28 A13 A11 A10 I/O7 0010D–PEEPR–7/09 ...

Page 2

... When the device is deselected, the CMOS standby current is less than 300 μA. The AT28C010 is accessed like a Static RAM for the read or write cycle without the need for external components. The device contains a 128-byte page register to allow writing 128- bytes simultaneously ...

Page 3

... After writing the 3-byte command sequence and after t protected against inadvertent write operations. It should be noted, that once protected the host may still perform a byte or page write to the AT28C010. This is done by preceding the data to be written by the same 3-byte command sequence used to enable SDP. ...

Page 4

... Once set, SDP will remain active unless the disable command sequence is issued. Power transi- tions do not disable SDP and SDP will protect the AT28C010 during power-up and power-down conditions. All command sequences must conform to the page write timing specifications. The data in the enable and disable command sequences is not written to the device and the memory addresses used in the sequence may be written with data in either a byte or page write opera- tion ...

Page 5

... wichever occurs first ( pF This parameter is characterized and is not 100% tested de-asserted, it must remain de-asserted for at least 50ns during read operations other- wise incorrect data may be read. Min Max 2.0 0.45 2.4 4,2 AT28C010-20 AT28C010-25 Max Min Max Min 150 200 150 200 ...

Page 6

... Address Hold Time AH t Data Set-up Time DS t Data Hold Time DH t Write Pulse Width WP t Byte Load Cycle Time BLC t Write Pulse Width High WPH AT28C010 Military 6 Max This parameter is 100% characterized and is not 100% tested. Units Conditions OUT Min ...

Page 7

AC Write Waveforms WE Controlled CE Controlled Page Mode Characteristics Symbol Parameter Address, OE Set-up Time AS OES t Address Hold Time AH t Chip Select Set-up Time CS t Chip Select Hold Time CH t Write ...

Page 8

... Page Mode Write Waveforms Notes: AT28C010 Military through A16 must specify the page address during each high to low transition of WE (or CE must be high only when WE and CE are both low. (1)(2) 0010D–PEEPR–7/09 ...

Page 9

Chip Erase Waveforms min.) sec (min.) 0.5V Software Data Protection Enable Algorithm Notes: 0010D–PEEPR–7/09 LOAD DATA AA TO ADDRESS 5555 LOAD DATA 55 TO ADDRESS 2AAA LOAD DATA A0 TO ADDRESS 5555 LOAD DATA XX TO ANY ADDRESS LOAD LAST ...

Page 10

... Software Data Protection Disable Algorithm Software Protected Program Cycle Waveform Notes: AT28C010 Military 10 LOAD DATA AA TO ADDRESS 5555 LOAD DATA 55 TO ADDRESS 2AAA LOAD DATA 80 TO ADDRESS 5555 LOAD DATA AA TO ADDRESS 5555 LOAD DATA 55 TO ADDRESS 2AAA LOAD DATA 20 TO ...

Page 11

Data Polling Characterstics Symbol Parameter t Data Hold Time Hold Time OEH ( Output Delay OE t Write Recovery Time WR Notes: Data Polling Waveforms Toggle Bit Characteristics Symbol Parameter t Data Hold Time ...

Page 12

... AT28C010 Ordering Information I (mA ACC (ns) Active Standby 120 80 0.3 150 80 0.3 200 80 0.3 250 80 0.3 Note: 32D6 32-Lead, 0.600" Wide, Non-Windowed, Ceramic Dual Inline (Cerdip) 32F 32-Lead, Non-Windowed, Ceramic Bottom-Brazed Flat Package (Flatpack) 32L 32-Pad, Non-Windowed, Ceramic Leadless Chip Carrier (LCC) ...

Page 13

Ordering Information I (mA ACC (ns) Active Standby 120 80 0.3 150 80 0.3 200 80 0.3 250 80 0.3 Note: 32D6 32-Lead, 0.600" Wide, Non-Windowed, Ceramic Dual Inline (Cerdip) 32F 32-Lead, Non-Windowed, Ceramic Bottom-Brazed Flat Package ...

Page 14

... BSC 0.737(0.029) 0.533(0.021) 1.27(0.050) TYP 1.02(0.040) X 45° 2.16(0.085) 7.62(0.300) BSC 1.65(0.065) *Controlling dimension: millimeters AT28C010 Mil 14 32F, 32-Lead, Non-Windowed, Ceramic Bottom Brazed Flat Package (Flatpack) Dimensions in Inches and (Millimeters) MIL-STD-1835 F-18 CONFIG B PIN 1 15.50(0.610) 21.08(0.830) 13.00(0.510) 20.60(0.811) 2 ...

Page 15

Packaging Information 30U, 30-Pin, Ceramic Pin Grid Array (PGA) Dimensions in Inches and (Millimeters) 13.74(0.541) 2.57(0.101) 13.36(0.526) 2.06(0.081) 16.18(0.637) 15.82(0.623) 14.17(0.558) 13.77(0.542) 2.54(0.100) TYP 16.71(0.658) 12.70(0.500) TYP 16.31(0.642) 2.54(0.100) TYP 10.41(0.410) 9.91(0.390) 0010D–PEEPR–7/09 7.26(0.286) 6.50(0.256) 1.40(0.055) 1.14(0.045) 0.58(0.023) 0.43(0.017) 3.12(0.123) ...

Page 16

... Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDI- TIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT ...

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