MC14012BDR2 ON Semiconductor, MC14012BDR2 Datasheet

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MC14012BDR2

Manufacturer Part Number
MC14012BDR2
Description
Logic Gates 3-18V Dual 4-Input
Manufacturer
ON Semiconductor
Datasheet

Specifications of MC14012BDR2

Product Category
Logic Gates
Product
NAND
Logic Family
MC140
Number Of Gates
2
Number Of Lines (input / Output)
4 / 1
High Level Output Current
- 4.2 mA
Low Level Output Current
4.2 mA
Propagation Delay Time
300 ns
Supply Voltage - Max
18 V
Supply Voltage - Min
3 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
SOIC-14
Minimum Operating Temperature
- 55 C
Number Of Input Lines
4
Number Of Output Lines
1
Factory Pack Quantity
2500

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC14012BDR2
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
Part Number:
MC14012BDR2G
Manufacturer:
ON/安森美
Quantity:
20 000
MC14012B
Dual 4-Input NAND Gates
P−Channel and N−Channel enhancement mode devices in a single
monolithic structure (Complementary MOS). Their primary use is
where low power dissipation and/or high noise immunity is desired.
Features
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Temperature Derating:
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high−impedance circuit. For proper operation, V
to the range V
(e.g., either V
MAXIMUM RATINGS
© Semiconductor Components Industries, LLC, 2011
June, 2011 − Rev. 9
Symbol
V
I
The MC14012B dual 4−input NAND gates are constructed with
This device contains protection circuitry to guard against damage due to high
Unused inputs must always be tied to an appropriate logic voltage level
in
in
Schottky TTL Load Over the Rated Temperature Range
Suffix Devices
Supply Voltage Range = 3.0 Vdc to 18 Vdc
All Outputs Buffered
Capable of Driving Two Low−Power TTL Loads or One Low−Power
Double Diode Protection on All Inputs
Pin−for−Pin Replacements for Corresponding CD4000 Series B
These Devices are Pb−Free and are RoHS Compliant
V
T
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
P
, V
, I
T
T
stg
DD
D
A
L
out
out
DC Supply Voltage Range
Input or Output Voltage Range
Input or Output Current
Power Dissipation, per Package
Ambient Temperature Range
Storage Temperature Range
Lead Temperature
SS
SS
(DC or Transient)
(DC or Transient) per Pin
(Note 1)
(8−Second Soldering)
or V
v (V
DD
in
). Unused outputs must be left open.
Parameter
or V
(Voltages Referenced to V
out
) v V
DD
.
in
and V
−0.5 to V
SS
−0.5 to +18.0
−55 to +125
−65 to +150
out
)
Value
± 10
500
260
should be constrained
DD
+ 0.5
1
Unit
mW
mA
°C
°C
°C
V
V
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
A
WL, L
YY, Y
WW, W
G
ORDERING INFORMATION
http://onsemi.com
CASE 751A
CASE 646
P SUFFIX
D SUFFIX
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
SOIC−14
PDIP−14
Publication Order Number:
14
1
14
1
DIAGRAMS
MC14012BCP
AWLYYWWG
MARKING
MC14012B/D
AWLYWW
14012BG

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MC14012BDR2 Summary of contents

Page 1

MC14012B Dual 4-Input NAND Gates The MC14012B dual 4−input NAND gates are constructed with P−Channel and N−Channel enhancement mode devices in a single monolithic structure (Complementary MOS). Their primary use is where low power dissipation and/or high noise immunity is ...

Page 2

... CONNECTION Figure 1. Pin Assignment ORDERING INFORMATION Device MC14012BCPG MC14012BDG MC14012BDR2G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. MC14012B Dual 4−Input NAND Gate OUT ...

Page 3

ELECTRICAL CHARACTERISTICS Î Î Î Î Î ...

Page 4

SWITCHING CHARACTERISTICS (Note 5 Î Î Î ...

Page 5

TYPICAL B−SERIES GATE CHARACTERISTICS N−CHANNEL DRAIN CURRENT (SINK) 5.0 4.0 3.0 2.0 1 1.0 2.0 3 DRAIN−TO−SOURCE VOLTAGE (Vdc) DS Figure 5.0 Vdc 8.0 6.0 4.0 ...

Page 6

VOLTAGE TRANSFER CHARACTERISTICS SINGLE INPUT NAND, AND MULTIPLE INPUT NOR, OR 5.0 4.0 SINGLE INPUT NOR, OR MULTIPLE INPUT NAND, AND 3.0 2.0 1 1.0 2.0 3.0 4.0 5 INPUT VOLTAGE (Vdc) in Figure 11. V ...

Page 7

−T− SEATING PLANE 0.13 (0.005) PACKAGE DIMENSIONS PDIP−14 CASE 646−06 ISSUE http://onsemi.com 7 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI ...

Page 8

... Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “ ...

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