MC14012BDR2 ON Semiconductor, MC14012BDR2 Datasheet - Page 6

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MC14012BDR2

Manufacturer Part Number
MC14012BDR2
Description
Logic Gates 3-18V Dual 4-Input
Manufacturer
ON Semiconductor
Datasheet

Specifications of MC14012BDR2

Product Category
Logic Gates
Product
NAND
Logic Family
MC140
Number Of Gates
2
Number Of Lines (input / Output)
4 / 1
High Level Output Current
- 4.2 mA
Low Level Output Current
4.2 mA
Propagation Delay Time
300 ns
Supply Voltage - Max
18 V
Supply Voltage - Min
3 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
SOIC-14
Minimum Operating Temperature
- 55 C
Number Of Input Lines
4
Number Of Output Lines
1
Factory Pack Quantity
2500

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC14012BDR2
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
Part Number:
MC14012BDR2G
Manufacturer:
ON/安森美
Quantity:
20 000
3.0
1.0
5.0
4.0
2.0
8.0
6.0
2.0
4.0
16
10
14
12
0
0
0
0
1.0
2.0
Figure 13. V
V
2.0
4.0
V
in
Figure 11. V
in
, INPUT VOLTAGE (Vdc)
, INPUT VOLTAGE (Vdc)
V
V
V
out
O
O
3.0
6.0
0
SINGLE INPUT NAND, AND
MULTIPLE INPUT NOR, OR
(a) Inverting Function
V
SINGLE INPUT NOR, OR
MULTIPLE INPUT NAND, AND
DD
4.0
DD
8.0
DD
= 15 Vdc
SINGLE INPUT NAND, AND
MULTIPLE INPUT NOR, OR
V
SINGLE INPUT NOR, OR
MULTIPLE INPUT NAND, A
IL
= 5.0 Vdc
5.0
10
VOLTAGE TRANSFER CHARACTERISTICS
V
Figure 14. DC Noise Immunity
IH
http://onsemi.com
V
V
V
DD
in
SS
= 0 VOLTS DC
6
from an ideal “1” or “0” input level which does not produce
output state change(s). The typical and guaranteed limit
values of the input values V
be at a fixed voltage V
Characteristics table. V
in Figure 11.
“0” levels =
The DC noise margin is defined as the input voltage range
Guaranteed minimum noise margins for both the “1” and
2.0
V
8.0
6.0
4.0
V
V
10
O
0
O
out
0
(b) Non−Inverting Function
0
1.0 V with a 5.0 V supply
2.0 V with a 10.0 V supply
2.5 V with a 15.0 V supply
V
2.0
DD
V
IL
4.0
Figure 12. V
DC NOISE MARGIN
V
in
, INPUT VOLTAGE (Vdc)
IL
6.0
and V
V
SINGLE INPUT NAND, AND
MULTIPLE INPUT NOR, OR
O
IH
IL
SINGLE INPUT NOR, OR
MULTIPLE INPUT NAND, AND
are given in the Electrical
8.0
and V
IH
DD
are presented graphically
V
V
= 10 Vdc
DD
in
10
IH
for the output(s) to

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