7008L20JI IDT, 7008L20JI Datasheet - Page 15

• Manufacturer Part Number: 7008L20JI
• Description: SRAM
• Manufacturer: IDT
• Type: Dual Port Static RAMr

Specifications of 7008L20JI

• Memory Size: 512 kbit
• Organization: 64 k x 8
• Access Time: 20 ns
• Supply Voltage - Max: 5.5 V
• Supply Voltage - Min: 4.5 V
• Maximum Operating Current: 50 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Package / Case: PLCC-84
• Interface: TTL
• Memory Type: Asynchronous
• Part # Aliases: IDT7008L20JI

Waveform of Interrupt Timing
NOTES:
1. All timing is the same for left and right ports. Port “A” may be either the left or right port. Port “B” is the port opposite from port “A”.
2. See Interrupt Truth Table.
3. Timing depends on which enable signal (CE or R/W) is asserted last.
4. Timing depends on which enable signal (CE or R/W) is de-asserted first.
5. Refer to Chip Enable Truth Table.
NOTES:
1. Assumes BUSY
2. If BUSY
3. If BUSY
4. INT
5. Refer to Chip Enable Truth Table.
Truth Table IV — Interrupt Flag
IDT7008S/L
High-Speed 64K x 8 Dual-Port Static RAM
ADDR
R/W
ADDR
X
X
X
L
R/W
L
L
INT
CE
INT
and INT
CE
OE
L
R
"A"
"A"
"A"
"B"
= V
"B"
"B"
"B"
= V
"B"
IL
R
CE
IL
X
X
L
L
, then no change.
, then no change.
must be initialized at power-up.
L
= BUSY
Left Port
OE
R
X
X
X
L
=V
L
IH
.
A
15L
FFFF
FFFE
X
X
-A
t
AS
t
AS
0L
t
(3)
INS
INTERRUPT CLEAR ADDRESS
t
(3)
INR
INTERRUPT SET ADDRESS
(3)
(3)
INT
L
H
X
X
(3)
(2)
L
(1,5)
R/W
(1,4,5)
X
X
X
L
R
t
t
WC
RC
6.42
15
CE
X
X
L
L
Right Port
Military, Industrial and Commercial Temperature Ranges
OE
X
X
X
(2)
L
(2)
R
t
WR
(4)
A
15R
FFFE
FFFF
X
X
-A
0R
INT
H
L
X
X
(2)
(3
R
)
Set Right INT
Reset Right INT
Set Left INT
Reset Left INT
3198 drw 18
3198 drw 17
Function
L
R
Flag
L
Flag
R
Flag
Flag
3198 tbl 16