BR24L64-W Rohm Semiconductor, BR24L64-W Datasheet - Page 6
![IC EEPROM 64KBIT 400KHZ 8DIP](/photos/7/22/72254/br24l64-w_sml.jpg)
BR24L64-W
Manufacturer Part Number
BR24L64-W
Description
IC EEPROM 64KBIT 400KHZ 8DIP
Manufacturer
Rohm Semiconductor
Datasheet
1.BR24L08F-WE2.pdf
(33 pages)
Specifications of BR24L64-W
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
64K (8K x 8)
Speed
400kHz
Interface
I²C, 2-Wire Serial
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
BR24L64-W
Manufacturer:
NXP
Quantity:
2 500
Part Number:
BR24L64-W
Manufacturer:
ROHM/罗姆
Quantity:
20 000
●Characteristic data (The following values are Typ. ones).
-100
-200
-100
-150
-200
300
200
100
-0.2
-0.4
-0.6
-50
0.6
0.5
0.4
0.3
0.2
0.1
0.2
50
0
5
4
3
2
1
0
0
0
0
Fig.27 Bus release time before transfer start tBUF
0
0
0
0
0
Fig.21 Input data hold time tHD:DAT(HIGH)
Fig.24 Input data setup time tSU:DAT(LOW)
Fig.30 Noise removal valid time tI(SCL L)
Ta=25℃
Ta=25℃
Ta=-40℃
Ta=25℃
Ta=25℃
Ta=85℃
Fig.33 WP setup time tSU:WP
1
1
1
1
1
SPEC1,2
SPEC2
SPEC1
SPEC1,2
SPEC2
2
2
2
2
2
Vcc[V]
Vcc[V]
SPEC1
Vcc[V]
Vcc[V]
Vcc[V]
SPEC1
Ta=-40℃
Ta=-40℃
3
3
Ta=85℃
3
3
3
Ta=85℃
Ta=85℃
4
4
4
4
4
Ta=-40℃
Ta=-40℃
Ta=25℃
Ta=85℃
5
5
5
5
5
6
6
6
6
6
-100
-150
-200
-50
0.6
0.5
0.4
0.3
0.2
0.1
1.2
0.8
0.6
0.4
0.2
50
4
3
2
1
0
6
5
4
3
2
1
0
0
1
0
0
0
0
0
0
0
Fig.22 Input data hold time tHD:DAT(LOW)
Fig.31 Noise removal valid time tI(SDA H)
Ta=-40℃
Ta=85℃
Ta=25℃
Fig.28 Internal write cycle time tWR
Ta=25℃
SPEC2
SPEC1
Fig.25 Output data delay time tPD0
Fig.34 WP valid time tHIGH:WP
1
1
1
1
1
SPEC1,2
SPEC1,2
SPEC1,2
2
SPEC1,2
SPEC2
2
2
2
2
Ta=85℃
Ta=-40℃
Ta=85℃
SPEC1
Vcc[V]
Vcc[V]
Vcc[V]
Vcc[V]
Vcc[V]
6/32
3
3
3
3
3
Ta=85℃
Ta=25℃
4
4
4
4
4
Ta=-40℃
Ta=-40℃
Ta=-40℃
Ta=25℃
Ta=85℃
Ta=25℃
5
5
5
5
5
6
6
6
6
6
-100
-200
300
200
100
0.6
0.5
0.4
0.3
0.2
0.1
0.6
0.5
0.4
0.3
0.2
0.1
4
3
2
1
0
0
0
0
0
0
0
0
Fig.23 Input data setup time tSU:DAT(HIGH)
Fig.29 Noise removal valid time tI(SCL H)
Fig.32 Noise removal valid time tI(SDA L)
Ta=-40℃
Ta=25℃
Ta=25℃
Ta=85℃
Fig.26 Output data delay time tPD1
SPEC2
Ta=25℃
SPEC1
1
1
1
1
SPEC2
SPEC1,2
SPEC2
SPEC1
2
2
2
2
SPEC1
SPEC1
Vcc[V]
Vcc[V]
Vcc[V]
Vcc[V]
3
3
3
Ta=85℃
3
Ta=85℃
Ta=-40℃
Ta=-40℃
4
4
4
4
Ta=85℃
Ta=25℃
Ta=-40℃
5
5
5
5
6
6
6
6