MT48H4M16LFB4-75 IT:H TR Micron Technology Inc, MT48H4M16LFB4-75 IT:H TR Datasheet - Page 37

• Manufacturer Part Number: MT48H4M16LFB4-75 IT:H TR
• Description: IC SDRAM 64MBIT 133MHZ 54VFBGA
• Manufacturer: Micron Technology Inc

Specifications of MT48H4M16LFB4-75 IT:H TR

• Format - Memory: RAM
• Memory Type: Mobile SDRAM
• Memory Size: 64M (4M x 16)
• Speed: 133MHz
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 1.9 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 54-VFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 557-1391-2

Table 8:
PDF: 09005aef8237ed98/Source: 09005aef8237ed68
64mb_x16_Mobile SDRAM_Y24L_2.fm - Rev. C 10/07 EN
Current State
precharging
precharge)
precharge)
activating,
(with auto
(with auto
precharge
precharge
active, or
disabled)
disabled)
Write
Write
(auto
(auto
Read
Read
Row
Any
Idle
Truth Table 4 – Current State Bank n, Command to Bank m
Notes: 1–6; notes appear below table and on next page
Notes:
CS#
H
X
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
RAS#
1. This table applies when CKE
2. This table describes alternate bank operation, except where noted; i.e., the current state is
3. Current state definitions:
4. AUTO REFRESH, SELF REFRESH, and LOAD MODE REGISTER commands may only be issued
H
H
H
H
H
H
H
H
H
H
H
X
X
L
L
L
L
L
L
L
L
L
L
after
for bank n and the commands shown are those allowed to be issued to bank m (assuming
that bank m is in such a state that the given command is allowable). Exceptions are covered
in the notes below.
Idle:
Row active:
Read:
Write:
Read with auto
precharge
enabled:
Write with auto
precharge
enabled:
when all banks are idle.
CAS#
X
H
X
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
L
L
t
XSR has been met (if the previous state was self refresh).
WE#
H
H
H
H
H
H
H
H
H
H
H
X
X
L
L
L
L
L
L
L
L
L
L
The bank has been precharged, and
A row in the bank has been activated, and
bursts/accesses and no register accesses are in progress.
A READ burst has been initiated with auto precharge disabled and has
not yet terminated or been terminated.
A WRITE burst has been initiated with auto precharge disabled and has
not yet terminated or been terminated.
Starts with registration of a READ command with auto precharge
enabled and ends when
be in the idle state.
Starts with registration of a WRITE command with auto precharge
enabled and ends when
be in the idle state.
Command (Action)
COMMAND INHIBIT (NOP/Continue previous operation)
NO OPERATION (NOP/Continue previous operation)
Any command otherwise allowed to bank m
ACTIVE (Select and activate row)
READ (Select column and start READ burst)
WRITE (Select column and start WRITE burst)
PRECHARGE
ACTIVE (Select and activate row)
READ (Select column and start new READ burst)
WRITE (Select column and start WRITE burst)
PRECHARGE
ACTIVE (Select and activate row)
READ (Select column and start READ burst)
WRITE (Select column and start new WRITE burst)
PRECHARGE
ACTIVE (Select and activate row)
READ (Select column and start new READ burst)
WRITE (Select column and start WRITE burst)
PRECHARGE
ACTIVE (Select and activate row)
READ (Select column and start READ burst)
WRITE (Select column and start new WRITE burst)
PRECHARGE
n-1
37
was HIGH and CKE
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
t
RP has been met. After
RP has been met. After
64Mb: 4 Meg x 16 Mobile SDRAM
n
is HIGH (see Table 6 on page 34) and
t
RP has been met.
t
RCD has been met. No data
©2006 Micron Technology, Inc. All rights reserved.
t
t
RP is met, the bank will
RP is met, the bank will
Operations
7, 8, 14
7, 8, 15
7, 8, 16
7, 8, 17
Notes
7, 10
7, 11
7, 12
7, 13
7
7
9
9
9
9