IS62C256-45UL-TR ISSI, IS62C256-45UL-TR Datasheet

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IS62C256-45UL-TR

Manufacturer Part Number
IS62C256-45UL-TR
Description
SRAM 256K 32K x 8 45ns 5v
Manufacturer
ISSI
Type
Asynchronousr
Datasheet

Specifications of IS62C256-45UL-TR

Product Category
SRAM
Rohs
yes
Memory Size
256 Kbit
Organization
32 K x 8
Access Time
45 ns
Supply Voltage - Max
5.5 V
Supply Voltage - Min
4.5 V
Maximum Operating Current
60 mA
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Package / Case
SOP-28
Interface
TTL
Factory Pack Quantity
1000
IS65C256AL
IS62C256AL
32K x 8 LOW POWER CMOS STATIC RAM
FEATURES
• Access time: 25 ns, 45 ns
• Low active power: 200 mW (typical)
• Low standby power
• Fully static operation: no clock or refresh
• TTL compatible inputs and outputs
• Single 5V power supply
• Lead-free available
• Industrial and Automotive temperatures avail-
FUNCTIONAL BLOCK DIAGRAM
Integrated Silicon Solution, Inc. — www.issi.com
Rev. D
05/09/12
Copyright © 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability
arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any
published information and before placing orders for products.
— 150 µW (typical) CMOS standby
— 15 mW (typical) operating
required
able
I/O0-I/O7
A0-A14
VDD
GND
CE
OE
WE
DECODER
CIRCUIT
CONTROL
CIRCUIT
DATA
I/O
DESCRIPTION
The
32,768 word by 8-bit CMOS static RAM. It is fabricated
using
nology.
When CE is HIGH (deselected), the device assumes a
standby mode at which the power dissipation can be
reduced down to 150 µW (typical) at CMOS input levels.
Easy memory expansion is provided by using an active
LOW Chip Select (CE) input and an active LOW Output
Enable (OE) input. The active LOW Write Enable (WE)
controls both writing and reading of the memory.
The IS62C256AL/IS65C256AL is pin compatible with
other 32Kx8 SRAMs in plastic SOP or TSOP (Type I)
package.
ISSI
ISSI
MEMORY ARRAY
's high-performance, low power CMOS tech-
IS62C256AL/IS65C256AL is a low power,
COLUMN I/O
32K X 8
MAY 2012
1

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IS62C256-45UL-TR Summary of contents

Page 1

... Easy memory expansion is provided by using an active LOW Chip Select (CE) input and an active LOW Output Enable (OE) input. The active LOW Write Enable (WE) controls both writing and reading of the memory. The IS62C256AL/IS65C256AL is pin compatible with other 32Kx8 SRAMs in plastic SOP or TSOP (Type I) package. 32K X 8 ...

Page 2

... IS65C256AL IS62C256AL PIN CONFIGURATION 28-Pin SOP A14 1 28 VDD WE A12 A13 A11 A10 I/O7 I/ I/O6 I/ I/O5 I/ I/O4 GND 14 15 I/O3 PIN DESCRIPTIONS A0-A14 Address Inputs CE Chip Select Input OE Output Enable Input ...

Page 3

... IS65C256AL IS62C256AL OPERATING RANGE Part No. Range IS62C256AL Commercial IS62C256AL Industrial IS65C256AL Automotive DC ELECTRICAL CHARACTERISTICS Symbol Parameter V Output HIGH Voltage OH V Output LOW Voltage OL V Input HIGH Voltage IH V Input LOW Voltage ( Input Leakage LI I Output Leakage LO Note –3.0V for pulse width less than 10 ns. ...

Page 4

... IS65C256AL IS62C256AL POWER SUPPLY CHARACTERISTICS Symbol Parameter I V Operating Supply Current I V Dynamic Operating Supply Current I TTL Standby Current 1 SB (TTL Inputs) I CMOS Standby 2 SB Current (CMOS Inputs) Note address and data inputs are cycling at the maximum frequency means no input lines change. ...

Page 5

... IS65C256AL IS62C256AL READ CYCLE SWITCHING CHARACTERISTICS Symbol Parameter t Read Cycle Time RC t Address Access Time AA t Output Hold Time OHA CE Access Time t ACS OE Access Time t DOE OE to Low-Z Output t (2) LZOE OE to High-Z Output t (2) HZOE CE to Low-Z Output t (2) LZCS ...

Page 6

... IS65C256AL IS62C256AL AC WAVEFORMS (1,2) READ CYCLE NO. 1 ADDRESS D OUT PREVIOUS DATA VALID (1,3) READ CYCLE NO. 2 ADDRESS LZCS HIGH-Z D OUT Notes HIGH for a Read Cycle. 2. The device is continuously selected. OE Address is valid prior to or coincident with CE LOW transitions ...

Page 7

... IS65C256AL IS62C256AL WRITE CYCLE SWITCHING CHARACTERISTICS Symbol Parameter t Write Cycle Time Write End t SCS t Address Setup Time to Write End AW t Address Hold from Write End HA t Address Setup Time SA WE Pulse Width t 1, PWE t (4) 2 PWE t Data Setup to Write End ...

Page 8

... IS65C256AL IS62C256AL AC WAVEFORMS WRITE CYCLE NO. 2 (OE is HIGH During Write Cycle) ADDRESS OE CE LOW DATA UNDEFINED OUT D IN WRITE CYCLE NO. 3 (OE is LOW During Write Cycle) ADDRESS OE LOW CE LOW DATA UNDEFINED OUT D IN Notes: 1. The internal write time is defined by the overlap of CE LOW and WE LOW. All signals must be in valid states to initiate a Write, but any one can go inactive to terminate the Write ...

Page 9

... IS65C256AL IS62C256AL DATA RETENTION SWITCHING CHARACTERISTICS Symbol Parameter V V for Data Retention Data Retention Current DR t Data Retention Setup Time See Data Retention Waveform SDR t Recovery Time RDR Note: 1. Typical Values are measured 5V DATA RETENTION WAVEFORM (CE t SDR VDD 4 ...

Page 10

... Plastic SOP, Lead-free ORDERING INFORMATION Industrial Range: –40°C to +85°C Speed (ns) Order Part No. Package 25 IS62C256AL-25TI TSOP IS62C256AL-25ULI Plastic SOP, Lead-free 45 IS62C256AL-45TI TSOP IS62C256AL-45TLI TSOP, Lead-free IS62C256AL-45ULI Plastic SOP, Lead-free ORDERING INFORMATION Automotive Range: –40°C to +125°C Speed (ns) Order Part No. Package 25 ...

Page 11

... IS65C256AL IS62C256AL Integrated Silicon Solution, Inc. Rev. D 05/09/12 11 ...

Page 12

... IS65C256AL IS62C256AL 12 Integrated Silicon Solution, Inc. Rev. D 05/09/12 ...

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