IS62C256-45UL-TR ISSI, IS62C256-45UL-TR Datasheet - Page 2

• Manufacturer Part Number: IS62C256-45UL-TR
• Description: SRAM 256K 32K x 8 45ns 5v
• Manufacturer: ISSI
• Type: Asynchronousr

Specifications of IS62C256-45UL-TR

• Product Category: SRAM
• Rohs: yes
• Memory Size: 256 Kbit
• Organization: 32 K x 8
• Access Time: 45 ns
• Supply Voltage - Max: 5.5 V
• Supply Voltage - Min: 4.5 V
• Maximum Operating Current: 60 mA
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Package / Case: SOP-28
• Interface: TTL
• Factory Pack Quantity: 1000

IS65C256AL
IS62C256AL
PIN CONFIGURATION
28-Pin SOP
ABSOLUTE MAXIMUM RATINGS
Note:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
2
PIN DESCRIPTIONS
A0-A14
CE
OE
WE
I/O0-I/O7
V
GND
Symbol
V
T
P
I
permanent damage to the device. This is a stress rating only and functional operation of the
device at these or any other conditions above those indicated in the operational sections of
this specification is not implied. Exposure to absolute maximum rating conditions for extended
periods may affect reliability.
DD
OUT
STG
TERM
T
GND
I/O0
I/O1
I/O2
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
Parameter
Terminal Voltage with Respect to GND
Storage Temperature
Power Dissipation
DC Output Current (LOW)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Address Inputs
Chip Select Input
Output Enable Input
Write Enable Input
Input/Output
Power
Ground
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VDD
WE
A13
A8
A9
A11
OE
A10
CE
I/O7
I/O6
I/O5
I/O4
I/O3
(1)
TRUTH TABLE
Mode
Not Selected
(Power-down)
Output Disabled
Read
Write
PIN CONFIGURATION
28-Pin TSOP
VDD
A11
A13
A14
A12
WE
OE
A9
A8
A7
A6
A5
A4
A3
–0.5 to +7.0
–65 to +150
22
23
24
25
26
27
28
1
2
3
4
5
6
7
Value
0.5
20
WE
WE
WE
WE
WE
H
H
X
L
CE
CE
CE
CE
CE
H
L
L
L
Unit
mA
° C
W
V
OE
OE
OE
OE
OE
X
H
X
L
Integrated Silicon Solution, Inc.
I/O Operation
High-Z
High-Z
D
D
OUT
IN
V
DD
I
I
I
I
21
20
19
18
17
16
15
14
13
12
11
10
CC
CC
CC
SB
9
8
Current
1
1
1
1
, I
, I
, I
, I
SB
CC
CC
CC
A10
CE
I/O7
I/O6
I/O5
I/O4
I/O3
GND
I/O2
I/O1
I/O0
A0
A1
A2
05/09/12
Rev. D
2
2
2
2