IS61WV51216BLL-10TLI ISSI, Integrated Silicon Solution Inc, IS61WV51216BLL-10TLI Datasheet - Page 13

• Manufacturer Part Number: IS61WV51216BLL-10TLI
• Description: IC SRAM 8MBIT 10NS 44TSOP
• Manufacturer: ISSI, Integrated Silicon Solution Inc

Specifications of IS61WV51216BLL-10TLI

• Format - Memory: RAM
• Memory Type: SRAM - Asynchronous
• Memory Size: 8M (512K x 16)
• Speed: 10ns
• Interface: Parallel
• Voltage - Supply: 1.65 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TSOP II
• Density: 8Mb
• Access Time (max): 10ns
• Sync/async: Asynchronous
• Architecture: Not Required
• Clock Freq (max): Not RequiredMHz
• Operating Supply Voltage (typ): 2.5/3.3V
• Address Bus: 19b
• Package Type: TSOP-II
• Operating Temp Range: -40C to 85C
• Number Of Ports: 1
• Supply Current: 95mA
• Operating Supply Voltage (min): 2.4V
• Operating Supply Voltage (max): 3.6V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 44
• Word Size: 16b
• Number Of Words: 512K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 706-1107; IS61WV51216BLL-10TLI

IS61WV51216ALL
IS61WV51216BLL
IS64WV51216BLL
WRITE CYCLE SWITCHING CHARACTERISTICS
Notes:
1. Test conditions for IS61WV51216ALL/BLL assume signal transition times of 1.5ns or less, timing
2. Tested with the load in Figure 1b. Transition is measured ±500 mV from steady-state voltage. Not
3. The internal write time is defined by the overlap of CE LOW and UB or LB, and WE LOW. All signals
Integrated Silicon Solution, Inc. — www.issi.com
Rev. F
10/01/09
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
reference levels of 1.25V, input pulse levels of 0.4V to V
Figure 1a.
100% tested.
must be in valid states to initiate a Write, but any one can go inactive to terminate the Write. The
Data Input Setup and Hold timing are referenced to the rising or falling edge of the signal that
terminates the write.
WC
SCE
AW
HA
PWB
SD
HD
HZWE
SA
PWE
PWE
LZWE
1
2
(3)
(3)
Parameter
Write Cycle Time
CE to Write End
Address Setup Time
to Write End
Address Hold from Write End
Address Setup Time
LB, UB Valid to End of Write
WE Pulse Width (OE = HIGH)
WE Pulse Width (OE = LOW)
Data Setup to Write End
Data Hold from Write End
WE LOW to High-Z Output
WE HIGH to Low-Z Output
DD
Min.
20
12
12
12
12
17
—
0
0
9
0
3
-0.3V and output loading specified in
-20 ns
(1,2)
Max.
—
—
—
—
—
—
—
—
—
—
—
9
(Over Operating Range)
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
13