C8051F717-GMR Silicon Labs, C8051F717-GMR Datasheet - Page 156
C8051F717-GMR
Manufacturer Part Number
C8051F717-GMR
Description
8-bit Microcontrollers - MCU 16kB ADC Cap Sense
Manufacturer
Silicon Labs
Datasheet
1.C8051F709-GQR.pdf
(306 pages)
Specifications of C8051F717-GMR
Rohs
yes
Core
8051
Data Bus Width
8 bit
Processor Series
C8051
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C8051F70x/71x
23.4. EEPROM Security
RAM can only be downloaded to EEPROM after firmware writes a sequence of two bytes to EEKEY. In
order to enable EEPROM writes:
1. Write the first EEPROM key code byte to EEKEY: 0x55
2. Write the second EEPROM key code byte to EEKEY: 0xAA
After a EEPROM writes have been enabled and a single write has executed, the control logic locks
EEPROM writes until the two-byte unlock sequence has been entered into EEKEY again.
The protection state of the EEPROM can be observed by reading EEPSTATE (EEKEY2:0). This state can
be read at any time without affecting the EEPROM’s protection state.
If the two-byte unlock sequence is entered incorrectly, or if a write is attempted without first entering the
two-byte sequence, EEPROM writes will be locked until the next power-on reset.
SFR Definition 23.1. EEADDR: EEPROM Byte Address
SFR Address = 0xB6; SFR Page = All Pages
156
Name
Reset
7:5
4:0
Bit
Type
Bit
EEADDR[4:0]
Unused
Name
R
7
0
Read = 000b; Write = Don’t Care
EEPROM Byte Address
Selects one of 32 EEPROM bytes to read/write.
R
6
0
R
5
0
Rev. 1.0
4
0
Description
3
0
EEADDR[4:0]
R/W
2
0
1
0
0
0
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