M24512-WMN6TP STMicroelectronics, M24512-WMN6TP Datasheet - Page 19

IC EEPROM 512KBIT 400KHZ 8SOIC

M24512-WMN6TP

Manufacturer Part Number
M24512-WMN6TP
Description
IC EEPROM 512KBIT 400KHZ 8SOIC
Manufacturer
STMicroelectronics
Datasheets

Specifications of M24512-WMN6TP

Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
512K (64K x 8)
Speed
400kHz
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Density
512Kb
Interface Type
Serial (I2C)
Organization
64Kx8
Access Time (max)
900ns
Frequency (max)
400KHz
Write Protection
Yes
Data Retention
40Year
Operating Supply Voltage (typ)
3.3/5V
Operating Temp Range
-40C to 85C
Supply Current
5mA
Operating Supply Voltage (min)
2.5V
Operating Supply Voltage (max)
5.5V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-8626-2
M24512-WMN6TP

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M24512-WMN6TP
Manufacturer:
ELO
Quantity:
100
Part Number:
M24512-WMN6TP
Manufacturer:
STMicroelectronics
Quantity:
68 554
Part Number:
M24512-WMN6TP
Manufacturer:
ST
Quantity:
300
Part Number:
M24512-WMN6TP
Manufacturer:
ST
Quantity:
20 000
Part Number:
M24512-WMN6TP
0
Company:
Part Number:
M24512-WMN6TP
Quantity:
22 500
M24512-R, M24512-W, M24512-DR
3.13
Figure 10. Write cycle polling flowchart using ACK
Minimizing system delays by polling on ACK
During the internal Write cycle, the device disconnects itself from the bus, and writes a copy
of the data from its internal latches to the memory cells. The maximum Write time (t
shown in
can be used by the bus master.
The sequence, as shown in
First byte of instruction
with RW = 0 already
decoded by the device
Initial condition: a Write cycle is in progress.
Step 1: the bus master issues a Start condition followed by a device select code (the
first byte of the new instruction).
Step 2: if the device is busy with the internal Write cycle, no Ack will be returned and
the bus master goes back to Step 1. If the device has terminated the internal Write
cycle, it responds with an Ack, indicating that the device is ready to receive the second
part of the instruction (the first byte of this instruction having been sent during Step 1).
Table
14, but the typical time is shorter. To make use of this, a polling sequence
ReStart
Stop
NO
Figure
NO
Doc ID 16459 Rev 22
Start condition
Device select
addressing the
with RW = 0
in progress
operation is
Write cycle
Returned
memory
10, is:
ACK
Next
YES
Write operation
Write operation
Continue the
Data for the
YES
NO
and Receive ACK
Send Address
condition
Start
Random Read operation
Device select
Continue the
with RW = 1
YES
Device operation
AI01847d
w
) is
19/41

Related parts for M24512-WMN6TP