M95256-RDW6TP STMicroelectronics, M95256-RDW6TP Datasheet - Page 18
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M95256-RDW6TP
Manufacturer Part Number
M95256-RDW6TP
Description
IC EEPROM 256KBIT 2MHZ 8TSSOP
Manufacturer
STMicroelectronics
Datasheet
1.M95256-WMN6TP.pdf
(47 pages)
Specifications of M95256-RDW6TP
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
256K (32K x 8)
Speed
2MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-6352-2
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M95256-RDW6TP
Manufacturer:
ST
Quantity:
20 000
Instructions
18/47
Table 6.
1. As defined by the values in the Block Protect (BP1, BP0) bits of the Status Register, as shown in
The protection features of the device are summarized in
When the Status Register Write Disable (SRWD) bit of the Status Register is 0 (its initial
delivery state), it is possible to write to the Status Register (provided that the WEL bit has
previously been set by a WREN instruction), regardless of the logic level applied on the
Write Protect (W) input pin.
When the Status Register Write Disable (SRWD) bit of the Status Register is set to 1, two
cases need to be considered, depending on the state of Write Protect (W) input pin:
●
●
Regardless of the order of the two events, the Hardware Protected Mode (HPM) can be
entered:
●
●
Once entered in the Hardware Protected mode (HPM), the only way to exit the HPM mode is
to pull high the Write Protect (W) input pin.
If Write Protect (W) input pin is permanently tied high, the Hardware Protected mode (HPM)
can never be activated, and only the Software Protected mode (SPM), using the Block
Protect (BP1, BP0) bits of the Status Register, can be used.
W signal
1
0
1
0
If Write Protect (W) input pin is driven high, it is possible to write to the Status Register
(provided that the WEL bit has previously been set by a WREN instruction.
If Write Protect (W) input pin is driven low, it is not possible to write to the Status
Register even if the WEL bit has previously been set by a WREN instruction. (Attempts
to write to the Status Register are rejected, and are not accepted for execution). As a
consequence, all the data bytes in the memory area that are software protected (SPM)
by the Block Protect (BP1, BP0) bits of the Status Register, are also hardware
protected against data modification.
either by setting the SRWD bit after driving Write Protect (W) input pin low,
or by driving Write Protect (W) input pin low after setting the SRWD bit.
SRWD
Protection modes
bit
0
0
1
1
Protected
Hardware
Protected
Software
(HPM)
(SPM)
Mode
Doc ID 12276 Rev 13
Write protection of the
Status Register is
Writable (if the WREN
instruction has set the
WEL bit)
The values in the BP1
and BP0 bits can be
changed
Status Register is
Hardware write
protected
The values in the BP1
and BP0 bits cannot be
changed
Status Register
M95256-DR, M95256, M95256-W, M95256-R
Write-protected
Write-protected
Protected area
Table
6.
Memory content
(1)
Ready to accept Write
instructions
Ready to accept Write
instructions
Unprotected area
Table
6.
(1)