M29W640FB70ZA6E NUMONYX, M29W640FB70ZA6E Datasheet - Page 12
![IC FLASH 64MBIT 70NS 48TFBGA](/photos/7/24/72417/m29w640fb70za6e_sml.jpg)
M29W640FB70ZA6E
Manufacturer Part Number
M29W640FB70ZA6E
Description
IC FLASH 64MBIT 70NS 48TFBGA
Manufacturer
NUMONYX
Series
Axcell™r
Datasheet
1.M29W640FB70ZA6E.pdf
(71 pages)
Specifications of M29W640FB70ZA6E
Format - Memory
FLASH
Memory Type
FLASH - Nor
Memory Size
64M (8Mx8, 4Mx16)
Speed
70ns
Interface
Parallel
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TFBGA
Package
48TFBGA
Cell Type
NOR
Density
64 Mb
Architecture
Sectored
Block Organization
Asymmetrical
Location Of Boot Block
Bottom
Typical Operating Supply Voltage
3|3.3 V
Sector Size
8KByte x 8|64KByte x 127
Timing Type
Asynchronous
Interface Type
Parallel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-5032
497-5032
497-5032
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
M29W640FB70ZA6E
Manufacturer:
Micron Technology Inc
Quantity:
10 000
2.7
2.8
12/71
Write Enable (W)
The Write Enable, W, controls the Bus Write operation of the memory’s Command Interface.
V
The V
use an external high voltage power supply to reduce the time required for Unlock Bypass
Program operations. The Write Protect function provides a hardware method of protecting
the two outermost boot blocks. The V
unconnected.
When V
Program and Erase operations in this block are ignored while V
even when RP is at V
When V
of the two outermost boot blocks. Program and Erase operations can now modify the data in
the two outermost boot blocks unless the block is protected using Block Protection.
Applying V
(including the two outermost parameter blocks) using a High Voltage Block Protection
technique (In-System or Programmer technique). See
details.
When V
Bypass mode. When V
During Unlock Bypass Program operations the memory draws I
programming circuits. See the description of the Unlock Bypass command in the Command
Interface section. The transitions from V
t
Never raise V
memory may be left in an indeterminate state.
A 0.1μF capacitor should be connected between the V
Ground pin to decouple the current surges from the power supply. The PCB track widths
must be sufficient to carry the currents required during Unlock Bypass Program, I
Table 3.
VHVPP
V
PP
V
IH
PP
V
V
PPH
or V
/Write Protect (V
/WP
IL
PP
, see
PP
PP
PP
/Write Protect pin provides two functions. The V
ID
/Write Protect is Low, V
/Write Protect is High, V
/Write Protect is raised to V
PPH
Figure 13: Accelerated Program Timing
Hardware protection
PP
V
to the V
IH
/Write Protect to V
RP
V
V
V
or V
IH
ID
ID
ID
ID
PP
PP
.
/WP pin will temporarily unprotect any block previously protected
/Write Protect returns to V
2 outermost parameter blocks protected from Program/Erase operations
All blocks temporarily unprotected except the 2 outermost blocks
All blocks temporarily unprotected
All blocks temporarily unprotected
PP
/WP)
IL
PP
IH
, the memory protects the two outermost boot blocks;
, the memory reverts to the previous protection status
PP
from any mode except Read mode, otherwise the
PP
/Write Protect pin must not be left floating or
IH
the memory automatically enters the Unlock
to V
PP
and from V
IH
waveforms.
or V
Function
Table 3: Hardware protection
PP
PP
/Write Protect pin and the V
IL
function allows the memory to
normal operation resumes.
PP
PP
PP
to V
/Write Protect is Low,
from the pin to supply the
IH
must be slower than
PP
.
for
SS